Lower modes on ADV7511 require lower number of lanes for correct
operation. Switch lanes to 3 when the target mode's pixel clock
is less than 80 Mhz.
Based on patch by Andy Green <andy.green@linaro.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
regmap_update_bits(adv7511->regmap, 0x17,
0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
+ if (adv7511->type == ADV7533 && adv7511->num_dsi_lanes == 4) {
+ struct mipi_dsi_device *dsi = adv7511->dsi;
+ int lanes, ret;
+
+ if (adj_mode->clock > 80000)
+ lanes = 4;
+ else
+ lanes = 3;
+
+ if (lanes != dsi->lanes) {
+ mipi_dsi_detach(dsi);
+ dsi->lanes = lanes;
+ ret = mipi_dsi_attach(dsi);
+ if (ret) {
+ DRM_ERROR("Failed to change host lanes\n");
+ return;
+ }
+ }
+ }
+
drm_mode_copy(&adv7511->curr_mode, adj_mode);
/*