]> git.karo-electronics.de Git - karo-tx-uboot.git/commitdiff
Merge git://git.denx.de/u-boot-pxa
authorTom Rini <trini@konsulko.com>
Mon, 2 Mar 2015 12:24:15 +0000 (07:24 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 2 Mar 2015 12:24:15 +0000 (07:24 -0500)
16 files changed:
board/balloon3/balloon3.c
board/toradex/colibri_pxa270/colibri_pxa270.c
include/configs/balloon3.h
include/configs/colibri_pxa270.h
include/configs/flea3.h
include/configs/mx35pdk.h
include/configs/palmld.h
include/configs/palmtc.h
include/configs/palmtreo680.h
include/configs/snowball.h
include/configs/ti816x_evm.h
include/configs/u8500_href.h
include/configs/vexpress_common.h
include/configs/vpac270.h
include/configs/woodburn_common.h
include/configs/zipitz2.h

index aa108ca15390bf6628fb7ef520c0bd200520c2ea..458d90c8715855eb1efe4c790a12598a0f94c95e 100644 (file)
@@ -29,7 +29,7 @@ int board_init(void)
        dcache_disable();
        icache_disable();
 
-       /* arch number of vpac270 */
+       /* arch number of balloon3 */
        gd->bd->bi_arch_number = MACH_TYPE_BALLOON3;
 
        /* adress of boot parameters */
index 8d95e4d174614ece461a23b6fdd353c96224a965..3def0a6fd0709533beafcea38b44a50a4761bf75 100644 (file)
@@ -23,7 +23,7 @@ int board_init(void)
        dcache_disable();
        icache_disable();
 
-       /* arch number of vpac270 */
+       /* arch number of Toradex Colibri PXA270 */
        gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
 
        /* adress of boot parameters */
index 2f5a6609b8e84ae73a3d0aa9568d73121815f5bb..848a15832fe8e8c83bfadfa02cacbc5b368ea335 100644 (file)
@@ -13,7 +13,7 @@
  * High Level Board Configuration Options
  */
 #define        CONFIG_CPU_PXA27X               1       /* Marvell PXA270 CPU */
-#define        CONFIG_BALLOON3         1       /* Balloon3 board */
+#define        CONFIG_BALLOON3                 1       /* Balloon3 board */
 
 /*
  * Environment settings
 /*
  * Clock Configuration
  */
-#undef CONFIG_SYS_CLKS_IN_HZ
 #define        CONFIG_SYS_CPUSPEED             0x290           /* 520MHz */
 
 /*
  * DRAM Map
  */
-#define        CONFIG_NR_DRAM_BANKS            3               /* 2 banks of DRAM */
+#define        CONFIG_NR_DRAM_BANKS            3               /* 3 banks of DRAM */
 #define        PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 #define        PHYS_SDRAM_1_SIZE               0x08000000      /* 128 MB */
 #define        PHYS_SDRAM_2                    0xb0000000      /* SDRAM Bank #2 */
 #define        PHYS_SDRAM_2_SIZE               0x08000000      /* 128 MB */
-#define        PHYS_SDRAM_3                    0x80000000      /* SDRAM Bank #2 */
+#define        PHYS_SDRAM_3                    0x80000000      /* SDRAM Bank #3 */
 #define        PHYS_SDRAM_3_SIZE               0x08000000      /* 128 MB */
 
 #define        CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
 #define        CONFIG_ENV_IS_IN_FLASH
 #else
 #define        CONFIG_SYS_NO_FLASH
-#define        CONFIG_SYS_ENV_IS_NOWHERE
+#define        CONFIG_ENV_IS_NOWHERE
 #endif
 
 #define        CONFIG_SYS_MONITOR_BASE         0x000000
 #define        CONFIG_SYS_MDMRS_VAL    0x00220022
 #define        CONFIG_SYS_FLYCNFG_VAL  0x00000000
 #define        CONFIG_SYS_SXCNFG_VAL   0x00000000
-#define        CONFIG_SYS_MEM_BUF_IMP  0x0f
 
 /*
  * PCMCIA and CF Interfaces
index 08bd276b440a9f9d59d3d58c8c404decd969b2b2..7fc364e83895e8b9ae1cbe3a1493f716f80b4dd2 100644 (file)
@@ -2,18 +2,22 @@
  * Toradex Colibri PXA270 configuration file
  *
  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef        __CONFIG_H
+#define        __CONFIG_H
 
 /*
  * High Level Board Configuration Options
  */
 #define        CONFIG_CPU_PXA27X               1       /* Marvell PXA270 CPU */
+#define CONFIG_SYS_GENERIC_BOARD
 #define        CONFIG_SYS_TEXT_BASE            0x0
+/* Avoid overwriting factory configuration block */
+#define CONFIG_BOARD_SIZE_LIMIT                0x40000
 
 /*
  * Environment settings
 #define        CONFIG_SYS_MALLOC_LEN           (128 * 1024)
 #define        CONFIG_ARCH_CPU_INIT
 #define        CONFIG_BOOTCOMMAND                                              \
-       "if mmc init && fatload mmc 0 0xa0000000 uImage; then "         \
+       "if fatload mmc 0 0xa0000000 uImage; then "                     \
                "bootm 0xa0000000; "                                    \
        "fi; "                                                          \
        "if usb reset && fatload usb 0 0xa0000000 uImage; then "        \
                "bootm 0xa0000000; "                                    \
        "fi; "                                                          \
-       "bootm 0x80000;"
+       "bootm 0xc0000;"
 #define        CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
 #define        CONFIG_TIMESTAMP
 #define        CONFIG_BOOTDELAY                2       /* Autoboot delay */
@@ -50,6 +54,8 @@
  */
 #include <config_cmd_default.h>
 
+#undef CONFIG_CMD_LOADB                        /* Both together */
+#undef CONFIG_CMD_LOADS                        /* saves 10 KB */
 #define        CONFIG_CMD_NET
 #define        CONFIG_CMD_ENV
 #undef CONFIG_CMD_IMLS
@@ -59,7 +65,6 @@
 
 /*
  * Networking Configuration
- *  chip on the Voipac PXA270 board
  */
 #ifdef CONFIG_CMD_NET
 #define        CONFIG_CMD_PING
@@ -82,7 +87,7 @@
  */
 #define        CONFIG_SYS_HUSH_PARSER          1
 
-#define        CONFIG_SYS_LONGHELP
+#undef CONFIG_SYS_LONGHELP             /* Saves 10 KB */
 #ifdef CONFIG_SYS_HUSH_PARSER
 #define        CONFIG_SYS_PROMPT               "$ "
 #else
 #define        CONFIG_CMDLINE_EDITING          1
 #define        CONFIG_AUTO_COMPLETE            1
 
-
 /*
  * Clock Configuration
  */
 
 #else  /* No flash */
 #define        CONFIG_SYS_NO_FLASH
-#define        CONFIG_SYS_ENV_IS_NOWHERE
+#define        CONFIG_ENV_IS_NOWHERE
 #endif
 
 #define        CONFIG_SYS_MONITOR_BASE         0x0
-#define        CONFIG_SYS_MONITOR_LEN          0x80000
+#define        CONFIG_SYS_MONITOR_LEN          0x40000
 
+/* Skip factory configuration block */
 #define        CONFIG_ENV_ADDR                 \
-                       (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+                       (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
 #define        CONFIG_ENV_SIZE                 0x40000
 #define        CONFIG_ENV_SECT_SIZE            0x40000
-#define CONFIG_ENV_ADDR_REDUND         (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND         (CONFIG_ENV_SIZE)
 
 /*
  * GPIO settings
  */
 #define        CONFIG_SYS_GPSR0_VAL    0x00000000
 #define        CONFIG_SYS_GPSR1_VAL    0x00020000
-#define        CONFIG_SYS_GPSR2_VAL    0x0002C000
+#define        CONFIG_SYS_GPSR2_VAL    0x0002c000
 #define        CONFIG_SYS_GPSR3_VAL    0x00000000
 
 #define        CONFIG_SYS_GPCR0_VAL    0x00000000
 #define        CONFIG_SYS_GPCR2_VAL    0x00000000
 #define        CONFIG_SYS_GPCR3_VAL    0x00000000
 
-#define        CONFIG_SYS_GPDR0_VAL    0x08000000
-#define        CONFIG_SYS_GPDR1_VAL    0x0002A981
-#define        CONFIG_SYS_GPDR2_VAL    0x0202FC00
-#define        CONFIG_SYS_GPDR3_VAL    0x00000000
+#define        CONFIG_SYS_GPDR0_VAL    0xc8008000
+#define        CONFIG_SYS_GPDR1_VAL    0xfc02a981
+#define        CONFIG_SYS_GPDR2_VAL    0x92c3ffff
+#define        CONFIG_SYS_GPDR3_VAL    0x0061e804
 
-#define        CONFIG_SYS_GAFR0_L_VAL  0x00100000
-#define        CONFIG_SYS_GAFR0_U_VAL  0x00C00010
-#define        CONFIG_SYS_GAFR1_L_VAL  0x999A901A
-#define        CONFIG_SYS_GAFR1_U_VAL  0xAAA00008
-#define        CONFIG_SYS_GAFR2_L_VAL  0xAAAAAAAA
-#define        CONFIG_SYS_GAFR2_U_VAL  0x0109A000
-#define        CONFIG_SYS_GAFR3_L_VAL  0x54000300
-#define        CONFIG_SYS_GAFR3_U_VAL  0x00024001
+#define        CONFIG_SYS_GAFR0_L_VAL  0x80100000
+#define        CONFIG_SYS_GAFR0_U_VAL  0xa5c00010
+#define        CONFIG_SYS_GAFR1_L_VAL  0x6992901a
+#define        CONFIG_SYS_GAFR1_U_VAL  0xaaa50008
+#define        CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
+#define        CONFIG_SYS_GAFR2_U_VAL  0x4109a002
+#define        CONFIG_SYS_GAFR3_L_VAL  0x54000310
+#define        CONFIG_SYS_GAFR3_U_VAL  0x00005401
 
 #define        CONFIG_SYS_PSSR_VAL     0x30
 
 /*
  * Memory settings
  */
-#define        CONFIG_SYS_MSC0_VAL     0x000095f2
-#define        CONFIG_SYS_MSC1_VAL     0x00007ff4
-#define        CONFIG_SYS_MSC2_VAL     0x00000000
-#define        CONFIG_SYS_MDCNFG_VAL   0x08000ac9
-#define        CONFIG_SYS_MDREFR_VAL   0x2013e01e
-#define        CONFIG_SYS_MDMRS_VAL    0x00320032
-#define        CONFIG_SYS_FLYCNFG_VAL  0x00000000
+#define        CONFIG_SYS_MSC0_VAL     0x9ee1c5f2
+#define        CONFIG_SYS_MSC1_VAL     0x9ee1f994
+#define        CONFIG_SYS_MSC2_VAL     0x9ee19ee1
+#define        CONFIG_SYS_MDCNFG_VAL   0x090009c9
+#define        CONFIG_SYS_MDREFR_VAL   0x2003a031
+#define        CONFIG_SYS_MDMRS_VAL    0x00220022
+#define        CONFIG_SYS_FLYCNFG_VAL  0x00010001
 #define        CONFIG_SYS_SXCNFG_VAL   0x40044004
 
 /*
  * PCMCIA and CF Interfaces
  */
-#define        CONFIG_SYS_MECR_VAL     0x00000001
-#define        CONFIG_SYS_MCMEM0_VAL   0x00014307
+#define        CONFIG_SYS_MECR_VAL     0x00000000
+#define        CONFIG_SYS_MCMEM0_VAL   0x00028307
 #define        CONFIG_SYS_MCMEM1_VAL   0x00014307
-#define        CONFIG_SYS_MCATT0_VAL   0x0001c787
+#define        CONFIG_SYS_MCATT0_VAL   0x00038787
 #define        CONFIG_SYS_MCATT1_VAL   0x0001c787
-#define        CONFIG_SYS_MCIO0_VAL    0x0001430f
+#define        CONFIG_SYS_MCIO0_VAL    0x0002830f
 #define        CONFIG_SYS_MCIO1_VAL    0x0001430f
 
 #include "pxa-common.h"
 
-#endif /* __CONFIG_H */
+#endif /* __CONFIG_H */
index bf02829cde58f856efcf01647989fe3cdc9f603f..edff0f54cf491385c50cf6767a47dca11da184e6 100644 (file)
 #define CONFIG_SYS_MEMTEST_START       0       /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x10000
 
-#undef CONFIG_SYS_CLKS_IN_HZ   /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 /*
index a145f0812f39803a5572fcdb62427a4963961743..603d17cef69a123b206a5a0741558d11a1e07ff0 100644 (file)
 #define CONFIG_SYS_MEMTEST_START       0       /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x10000
 
-#undef CONFIG_SYS_CLKS_IN_HZ   /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 /*
index 9480d8daf2f28ed5c5f686ea4ce0941a42f98c6a..7dbc9aee3ac223cf23afe4a29b7aab364b742e30 100644 (file)
 /*
  * Clock Configuration
  */
-#undef CONFIG_SYS_CLKS_IN_HZ
 #define        CONFIG_SYS_CPUSPEED             0x210           /* 416MHz ; N=2,L=16 */
 
 /*
index 8abce1b425f66bfddf92a02780ed0fa01f395a6c..75506b22f334010009595b01f41eef3badb1726f 100644 (file)
 /*
  * Clock Configuration
  */
-#undef CONFIG_SYS_CLKS_IN_HZ
 #define        CONFIG_SYS_CPUSPEED             0x161           /* 400MHz;L=1 M=3 T=1 */
 
 /*
index 6490be55045286c7e943010ee18dc1fe63033f68..bd0f44b0d8993b44729850507035f7e76eb6be30 100644 (file)
 /*
  * Clock Configuration
  */
-#undef  CONFIG_SYS_CLKS_IN_HZ
 #define CONFIG_SYS_CPUSPEED             0x210           /* 416MHz ; N=2,L=16 */
 
 /*
index dacb5604cd6400ec442199d9628af9e3bc7a7588..126201cf9619d49cbef13ceed3e49c7c93c32925 100644 (file)
 #define CONFIG_SYS_MAXARGS     32      /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
 
-#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 #define CONFIG_SYS_LOAD_ADDR           0x00100000 /* default load address */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1
 
index 87a4efcd5a89377dbe72b91c861d40ee5f9beb88..f69a5599262d40fe3aa30da2e777b5e7fd070520 100644 (file)
@@ -58,7 +58,6 @@
                + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* boot arg buffer size */
 
-#undef  CONFIG_SYS_CLKS_IN_HZ
 #define CONFIG_SYS_LOAD_ADDR           0x81000000 /* Default load address */
 
 #define CONFIG_CMD_ASKEN
index 8d7970a376ee44bb6411ad6974e8c33c084bfbd7..5302b1fb81dd43ac0abefa6d8800c4a75fe97192 100644 (file)
 #define CONFIG_SYS_MAXARGS     32      /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
 
-#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 #define CONFIG_SYS_LOAD_ADDR           0x00100000 /* default load address */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 
index 2dea9210454a7b6dd7cf824aea89295d84864e22..989e755279ea442bc6c4aabc6fb4e9b9d335b785 100644 (file)
 #define CONFIG_BOOTP_PXE_CLIENTARCH    0x100
 
 /* Miscellaneous configurable options */
-#undef CONFIG_SYS_CLKS_IN_HZ
 #define CONFIG_SYS_LOAD_ADDR           (V2M_BASE + 0x8000)
 #define LINUX_BOOT_PARAM_ADDR          (V2M_BASE + 0x2000)
 #define CONFIG_BOOTDELAY               2
index 2fb91a8f8c1fdbf7248e225e3d1fbd625817c701..887433b16f4bac6b4d2a3fde11d7b284e5711ca5 100644 (file)
 
 #else  /* No flash */
 #define        CONFIG_SYS_NO_FLASH
-#define        CONFIG_SYS_ENV_IS_NOWHERE
+#define        CONFIG_ENV_IS_NOWHERE
 #endif
 
 /*
 #define        CONFIG_SYS_MDMRS_VAL    0x00000000
 #define        CONFIG_SYS_FLYCNFG_VAL  0x00000000
 #define        CONFIG_SYS_SXCNFG_VAL   0x40044004
-#define        CONFIG_SYS_MEM_BUF_IMP  0x0f
 
 /*
  * PCMCIA and CF Interfaces
index c7a17f7a49d3809693e047f4975125f34f1886fe..8e1c7a44ccf03a8738de06a3b06fd56cd2ea6a7f 100644 (file)
 #define CONFIG_SYS_MEMTEST_START       0       /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x10000
 
-#undef CONFIG_SYS_CLKS_IN_HZ   /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 /*
index fe331bc0825989a7c612a01b2fcbe20b81bdaff5..1dbbc15256e3563708e23f34739d3926ae779461 100644 (file)
@@ -136,7 +136,6 @@ unsigned char zipitz2_spi_read(void);
 /*
  * Clock Configuration
  */
-#undef CONFIG_SYS_CLKS_IN_HZ
 #define CONFIG_SYS_CPUSPEED            0x190           /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
 
 /*