#define MX6Q_SABREAUTO_CAN1_EN IMX_GPIO_NR(7, 13)
#define MX6Q_SABREAUTO_CAN2_STBY MX6Q_SABREAUTO_IO_EXP_GPIO2(1)
#define MX6Q_SABREAUTO_CAN2_EN IMX_GPIO_NR(5, 24)
+#define MX6Q_SABREAUTO_I2C_EXP_RST IMX_GPIO_NR(1, 15)
#define MX6Q_SMD_CSI0_RST IMX_GPIO_NR(4, 5)
#define MX6Q_SMD_CSI0_PWN IMX_GPIO_NR(5, 23)
/* SD2 */
MX6Q_PAD_SD2_CLK__USDHC2_CLK,
MX6Q_PAD_SD2_CMD__USDHC2_CMD,
- MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
+ MX6Q_PAD_SD2_DAT0__GPIO_1_15,
MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
MX6Q_PAD_CSI0_DAT9__I2C1_SCL,
/* I2C2 */
- MX6Q_PAD_KEY_COL3__I2C2_SCL,
+ MX6Q_PAD_EIM_EB2__I2C2_SCL,
MX6Q_PAD_KEY_ROW3__I2C2_SDA,
/* DISPLAY */
};
static iomux_v3_cfg_t mx6q_sabreauto_i2c3_pads[] = {
- MX6Q_PAD_GPIO_5__I2C3_SCL,
+ MX6Q_PAD_GPIO_3__I2C3_SCL,
MX6Q_PAD_GPIO_16__I2C3_SDA,
};
static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
{
- I2C_BOARD_INFO("max7310", 0x1F),
+ I2C_BOARD_INFO("max7310", 0x30),
.platform_data = &max7310_platdata,
},
{
- I2C_BOARD_INFO("max7310", 0x1B),
+ I2C_BOARD_INFO("max7310", 0x32),
.platform_data = &max7310_u48_platdata,
},
{
mxc_iomux_v3_setup_multiple_pads(mx6q_sabreauto_can_pads,
ARRAY_SIZE(mx6q_sabreauto_can_pads));
+ /* assert i2c-rst */
+ gpio_request(MX6Q_SABREAUTO_I2C_EXP_RST, "i2c-rst");
+ gpio_direction_output(MX6Q_SABREAUTO_I2C_EXP_RST, 1);
+
if (mipi_sensor)
mxc_iomux_v3_setup_multiple_pads(
mx6q_sabreauto_mipi_sensor_pads,
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define MX6Q_DISP_PAD_CLT MX6Q_HIGH_DRV
+
#define MX6Q_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \
PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_40ohm | \
PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_SPEED_MED)
#define MX6Q_PAD_EIM_EB2__GPIO_2_30 \
(_MX6Q_PAD_EIM_EB2__GPIO_2_30 | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_EIM_EB2__I2C2_SCL \
- (_MX6Q_PAD_EIM_EB2__I2C2_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+ (_MX6Q_PAD_EIM_EB2__I2C2_SCL | MUX_PAD_CTRL(MX6Q_I2C_PAD_CTRL))
#define MX6Q_PAD_EIM_EB2__SRC_BT_CFG_30 \
(_MX6Q_PAD_EIM_EB2__SRC_BT_CFG_30 | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 \
(_MX6Q_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_GPIO_3__I2C3_SCL \
- (_MX6Q_PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+ (_MX6Q_PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(MX6Q_I2C_PAD_CTRL))
#define MX6Q_PAD_GPIO_3__ANATOP_ANATOP_24M_OUT \
(_MX6Q_PAD_GPIO_3__ANATOP_ANATOP_24M_OUT | MUX_PAD_CTRL(NO_PAD_CTRL))
#define MX6Q_PAD_GPIO_3__CCM_CLKO2 \