]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
amd-xgbe: Checkpatch driver fixes
authorLendacky, Thomas <Thomas.Lendacky@amd.com>
Wed, 3 Sep 2014 17:14:33 +0000 (12:14 -0500)
committerDavid S. Miller <davem@davemloft.net>
Fri, 5 Sep 2014 22:11:20 +0000 (15:11 -0700)
This patch contains fixes identified by checkpatch when run with the
strict option.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/amd/xgbe/xgbe-common.h
drivers/net/ethernet/amd/xgbe/xgbe-dcb.c
drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c
drivers/net/ethernet/amd/xgbe/xgbe-desc.c
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
drivers/net/ethernet/amd/xgbe/xgbe-drv.c
drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c
drivers/net/ethernet/amd/xgbe/xgbe-main.c
drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
drivers/net/ethernet/amd/xgbe/xgbe.h

index cc25a3a9e7cf388d6da509c7bfb7277d0f70549a..caade30820d50b9851228589a192f17bb8c9a915 100644 (file)
 #define DMA_PBL_X8_DISABLE             0x00
 #define DMA_PBL_X8_ENABLE              0x01
 
-
 /* MAC register offsets */
 #define MAC_TCR                                0x0000
 #define MAC_RCR                                0x0004
 #define MTL_Q_DISABLED                 0x00
 #define MTL_Q_ENABLED                  0x02
 
-
 /* MTL traffic class register offsets
  *   Multiple traffic classes can be active.  The first class has registers
  *   that begin at 0x1100.  Each subsequent queue has registers that
 #define MTL_TSA_SP                     0x00
 #define MTL_TSA_ETS                    0x02
 
-
 /* PCS MMD select register offset
  *  The MMD select register is used for accessing PCS registers
  *  when the underlying APB3 interface is using indirect addressing.
  */
 #define PCS_MMD_SELECT                 0xff
 
-
 /* Descriptor/Packet entry bit positions and sizes */
 #define RX_PACKET_ERRORS_CRC_INDEX             2
 #define RX_PACKET_ERRORS_CRC_WIDTH             1
 #define MDIO_AN_COMP_STAT              0x0030
 #endif
 
-
 /* Bit setting and getting macros
  *  The get macro will extract the current bit field value from within
  *  the variable
@@ -957,7 +952,6 @@ do {                                                                        \
                              ((0x1 << (_width)) - 1)) << (_index)));   \
 } while (0)
 
-
 /* Bit setting and getting macros based on register fields
  *  The get macro uses the bit field definitions formed using the input
  *  names to extract the current bit field value from within the
@@ -986,7 +980,6 @@ do {                                                                        \
                 _prefix##_##_field##_INDEX,                            \
                 _prefix##_##_field##_WIDTH, (_val))
 
-
 /* Macros for reading or writing registers
  *  The ioread macros will get bit fields or full values using the
  *  register definitions formed using the input names
@@ -1014,7 +1007,6 @@ do {                                                                      \
        XGMAC_IOWRITE((_pdata), _reg, reg_val);                         \
 } while (0)
 
-
 /* Macros for reading or writing MTL queue or traffic class registers
  *  Similar to the standard read and write macros except that the
  *  base register value is calculated by the queue or traffic class number
@@ -1041,7 +1033,6 @@ do {                                                                      \
        XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val);               \
 } while (0)
 
-
 /* Macros for reading or writing DMA channel registers
  *  Similar to the standard read and write macros except that the
  *  base register value is obtained from the ring
@@ -1066,7 +1057,6 @@ do {                                                                      \
        XGMAC_DMA_IOWRITE((_channel), _reg, reg_val);                   \
 } while (0)
 
-
 /* Macros for building, reading or writing register values or bits
  * within the register values of XPCS registers.
  */
@@ -1076,7 +1066,6 @@ do {                                                                      \
 #define XPCS_IOREAD(_pdata, _off)                                      \
        ioread32((_pdata)->xpcs_regs + (_off))
 
-
 /* Macros for building, reading or writing register values or bits
  * using MDIO.  Different from above because of the use of standardized
  * Linux include values.  No shifting is performed with the bit
index 7d6a49b2432188665412ee2bdf44d58156cf51e9..8a50b01c2686292b06e97dae11c21c57095f6844 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static int xgbe_dcb_ieee_getets(struct net_device *netdev,
                                struct ieee_ets *ets)
 {
index 346592dca33ce98dd94e24f33f99eabb373f60cb..978f9ec961aeebb6a8dbdf14abd3e6d706f44964 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static ssize_t xgbe_common_read(char __user *buffer, size_t count,
                                loff_t *ppos, unsigned int value)
 {
index 1c5d62e8dab655013ea3883d983543ea7993a4b6..6fc5da01437d8ba75a3b8cf0cd16244b61e4f7d8 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static void xgbe_unmap_skb(struct xgbe_prv_data *, struct xgbe_ring_data *);
 
 static void xgbe_free_ring(struct xgbe_prv_data *pdata,
@@ -524,11 +523,8 @@ static void xgbe_realloc_skb(struct xgbe_channel *channel)
 
                /* Allocate skb & assign to each rdesc */
                skb = dev_alloc_skb(pdata->rx_buf_size);
-               if (skb == NULL) {
-                       netdev_alert(pdata->netdev,
-                                    "failed to allocate skb\n");
+               if (skb == NULL)
                        break;
-               }
                skb_dma = dma_map_single(pdata->dev, skb->data,
                                         pdata->rx_buf_size, DMA_FROM_DEVICE);
                if (dma_mapping_error(pdata->dev, skb_dma)) {
index edaca4496264862063835a444594471df29658a2..3be98e505001845ad2b02fa307ddc45877aed81c 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,
                                      unsigned int usec)
 {
index dc84f7193c2db62aaf5d922f9beb409b13a975c3..847da66d15485bf39beec98590bca2f3cd03befa 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static int xgbe_poll(struct napi_struct *, int);
 static void xgbe_set_rx_mode(struct net_device *);
 
index a076aca138a12ce4cdf69fb872d1d61c4202fbfa..2289526b6f1cef4d16b9152cdd71e4e67b395222 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 struct xgbe_stats {
        char stat_string[ETH_GSTRING_LEN];
        int stat_size;
@@ -173,6 +172,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = {
        XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror),
        XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes),
 };
+
 #define XGBE_STATS_COUNT       ARRAY_SIZE(xgbe_gstring_stats)
 
 static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
index 8aa6a9353f7bc5b5b3cf7592bc42186a93ca0bce..984161d4ffc9475a549b7ad7862bddcb41526e29 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_VERSION(XGBE_DRV_VERSION);
index 6d2221e023f45a70ebdcb32f668f32b0e59b7671..363b210560f332e08837e9bfb9426dcea62707a4 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg)
 {
        struct xgbe_prv_data *pdata = mii->priv;
index 37e64cfa5718e6e45dc71d580296101327b7f49a..a1bf9d1cdae1e9d5dc666cf7b37f6320d1b2adff 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-
 static cycle_t xgbe_cc_read(const struct cyclecounter *cc)
 {
        struct xgbe_prv_data *pdata = container_of(cc,
index 07bf70a82908ead8e75b6e4704946ae10c961b37..84fe34ce5571772de3e205e7c4c77d706b8fac5d 100644 (file)
 #include <linux/net_tstamp.h>
 #include <net/dcbnl.h>
 
-
 #define XGBE_DRV_NAME          "amd-xgbe"
 #define XGBE_DRV_VERSION       "1.0.0-a"
 #define XGBE_DRV_DESC          "AMD 10 Gigabit Ethernet Driver"
        ((_ring)->rdata +                                       \
         ((_idx) & ((_ring)->rdesc_count - 1)))
 
-
 /* Default coalescing parameters */
 #define XGMAC_INIT_DMA_TX_USECS                50
 #define XGMAC_INIT_DMA_TX_FRAMES       25