ENGR00179804 change NAND clock source from pll2_pfd_352M to pll2_pfd_400M

Due to pll2_pfd_352M would be used for LVDS, change NAND clock source to
pll2_pfd_400M.

Signed-off-by: Allen Xu <allen.xu@freescale.com>

diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index d83d4e4923e4aaea3c6410bd7d4454195a24794a..b766627cd8f460e50ed6957b921a7e89057fa0fe 100644 (file)
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -3874,7 +3874,7 @@ static int _clk_enfc_set_rate(struct clk *clk, unsigned long rate)
 static struct clk enfc_clk = {
        __INIT_CLK_DEBUG(enfc_clk)
         .id = 0,
-        .parent = &pll2_pfd_352M,
+        .parent = &pll2_pfd_400M,
         .enable_reg = MXC_CCM_CCGR2,
         .enable_shift = MXC_CCM_CCGRx_CG7_OFFSET,
         .enable = _clk_enable,