spin_lock_irq(&udc->lock);
for (i = 0; i < inode->i_size / 4; i++)
- data[i] = __raw_readl(udc->regs + i * 4);
+ data[i] = usba_io_readl(udc->regs + i * 4);
spin_unlock_irq(&udc->lock);
file->private_data = data;
if (crq->wLength != cpu_to_le16(sizeof(status)))
goto stall;
ep->state = DATA_STAGE_IN;
- __raw_writew(status, ep->fifo);
+ usba_io_writew(status, ep->fifo);
usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
break;
}
| USBA_BF(name, value))
/* Register access macros */
+#ifdef CONFIG_AVR32
+#define usba_io_readl __raw_readl
+#define usba_io_writel __raw_writel
+#define usba_io_writew __raw_writew
+#else
+#define usba_io_readl readl_relaxed
+#define usba_io_writel writel_relaxed
+#define usba_io_writew writew_relaxed
+#endif
+
#define usba_readl(udc, reg) \
- __raw_readl((udc)->regs + USBA_##reg)
+ usba_io_readl((udc)->regs + USBA_##reg)
#define usba_writel(udc, reg, value) \
- __raw_writel((value), (udc)->regs + USBA_##reg)
+ usba_io_writel((value), (udc)->regs + USBA_##reg)
#define usba_ep_readl(ep, reg) \
- __raw_readl((ep)->ep_regs + USBA_EPT_##reg)
+ usba_io_readl((ep)->ep_regs + USBA_EPT_##reg)
#define usba_ep_writel(ep, reg, value) \
- __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
+ usba_io_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
#define usba_dma_readl(ep, reg) \
- __raw_readl((ep)->dma_regs + USBA_DMA_##reg)
+ usba_io_readl((ep)->dma_regs + USBA_DMA_##reg)
#define usba_dma_writel(ep, reg, value) \
- __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
+ usba_io_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
/* Calculate base address for a given endpoint or DMA controller */
#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20)