drivers: reset: stih415: add softreset controller

This patch adds softreset controller for STiH415 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih415-softreset" is
registered with system configuration registers based reset controller
that controls the softreset state of the hardware such as Ethernet, IRB.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c
index 56c214644dd905f6dd82b3fd1d4a3ac8e912f26b..e6f6c41abe12d2cee4720d72313fc03c5dde4582 100644 (file)
--- a/drivers/reset/sti/reset-stih415.c
+++ b/drivers/reset/sti/reset-stih415.c
@@ -31,12 +31,29 @@ static const char stih415_lpm[] = "st,stih415-lpm-syscfg";
 #define STIH415_PDN_REAR(_cntl, _stat) \
        _SYSCFG_RST_CH(stih415_rear, SYSCFG_336, _cntl, SYSSTAT_384, _stat)
 
+#define STIH415_SRST_REAR(_reg, _bit) \
+       _SYSCFG_RST_CH_NO_ACK(stih415_rear, _reg, _bit)
+
+#define STIH415_SRST_SBC(_reg, _bit) \
+       _SYSCFG_RST_CH_NO_ACK(stih415_sbc, _reg, _bit)
+
+#define STIH415_SRST_FRONT(_reg, _bit) \
+       _SYSCFG_RST_CH_NO_ACK(stih415_front, _reg, _bit)
+
+#define STIH415_SRST_LPM(_reg, _bit) \
+       _SYSCFG_RST_CH_NO_ACK(stih415_lpm, _reg, _bit)
+
 #define SYSCFG_114     0x38 /* Powerdown request EMI/NAND/Keyscan */
 #define SYSSTAT_187    0x15c /* Powerdown status EMI/NAND/Keyscan */
 
 #define SYSCFG_336     0x90 /* Powerdown request USB/SATA/PCIe */
 #define SYSSTAT_384    0x150 /* Powerdown status USB/SATA/PCIe */
 
+#define SYSCFG_376     0x130 /* Reset generator 0 control 0 */
+#define SYSCFG_166     0x108 /* Softreset Ethernet 0 */
+#define SYSCFG_31      0x7c /* Softreset Ethernet 1 */
+#define LPM_SYSCFG_1   0x4 /* Softreset IRB */
+
 static const struct syscfg_reset_channel_data stih415_powerdowns[] = {
        [STIH415_EMISS_POWERDOWN]       = STIH415_PDN_FRONT(0),
        [STIH415_NAND_POWERDOWN]        = STIH415_PDN_FRONT(1),
@@ -49,15 +66,33 @@ static const struct syscfg_reset_channel_data stih415_powerdowns[] = {
        [STIH415_PCIE_POWERDOWN]        = STIH415_PDN_REAR(5, 8),
 };
 
+static const struct syscfg_reset_channel_data stih415_softresets[] = {
+       [STIH415_ETH0_SOFTRESET] = STIH415_SRST_FRONT(SYSCFG_166, 0),
+       [STIH415_ETH1_SOFTRESET] = STIH415_SRST_SBC(SYSCFG_31, 0),
+       [STIH415_IRB_SOFTRESET]  = STIH415_SRST_LPM(LPM_SYSCFG_1, 6),
+       [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9),
+       [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10),
+       [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11),
+};
+
 static struct syscfg_reset_controller_data stih415_powerdown_controller = {
        .wait_for_ack = true,
        .nr_channels = ARRAY_SIZE(stih415_powerdowns),
        .channels = stih415_powerdowns,
 };
 
+static struct syscfg_reset_controller_data stih415_softreset_controller = {
+       .wait_for_ack = false,
+       .active_low = true,
+       .nr_channels = ARRAY_SIZE(stih415_softresets),
+       .channels = stih415_softresets,
+};
+
 static struct of_device_id stih415_reset_match[] = {
        { .compatible = "st,stih415-powerdown",
          .data = &stih415_powerdown_controller, },
+       { .compatible = "st,stih415-softreset",
+         .data = &stih415_softreset_controller, },
        {},
 };