watchdog: sp5100_tco: Fix wrong indirect I/O access for getting value of reserved...

In case of SB800 or later chipset and re-programming MMIO address(*),
sp5100_tco module may read incorrect value of reserved bit, because the module
reads a value from an incorrect I/O address. However, this bug doesn't cause
a problem, because when re-programming MMIO address, by chance the module
writes zero (this is BIOS's default value) to the low three bits of register.
* In most cases, PC with SB8x0 or later chipset doesn't need to re-programming
  MMIO address, because such PC can enable AcpiMmio and can use 0xfed80b00 for
  watchdog register base address.

This patch fixes this bug.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176
Signed-off-by: Takahisa Tanaka <mc74hc00@gmail.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>

diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
index 2b0e000d4377de2714cbadcfb557c32c33a16321..5dfe86ebdc8b60f443745bc7217a2a668ba6e00e 100644 (file)
--- a/drivers/watchdog/sp5100_tco.c
+++ b/drivers/watchdog/sp5100_tco.c
@@ -500,14 +500,15 @@ static unsigned char sp5100_tco_setupdevice(void)
        /* Restore to the low three bits, if chipset is SB8x0(or later) */
        if (sp5100_tco_pci->revision >= 0x40) {
                u8 reserved_bit;
-               reserved_bit = inb(base_addr) & 0x7;
+               outb(base_addr+0, index_reg);
+               reserved_bit = inb(data_reg) & 0x7;
                val |= (u32)reserved_bit;
        }
 
        /* Re-programming the watchdog timer base address */
        outb(base_addr+0, index_reg);
        /* Low three bits of BASE are reserved */
-       outb((val >>  0) & 0xf8, data_reg);
+       outb((val >>  0) & 0xff, data_reg);
        outb(base_addr+1, index_reg);
        outb((val >>  8) & 0xff, data_reg);
        outb(base_addr+2, index_reg);