]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ENGR00153275-2 mx53 L2638 msl modifications when add ahci temp-monitor
authorRichard Zhu <r65037@freescale.com>
Tue, 19 Jul 2011 05:45:36 +0000 (13:45 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:33:01 +0000 (08:33 +0200)
based on the 2.6.38 kernel mainline, refer to linux std hwmon
architeture, add the standalone ahci temperature monitor driver
on fsl i.mx53 platforms.

Signed-off-by: Richard Zhu <r65037@freescale.com>
arch/arm/configs/imx5_defconfig
arch/arm/mach-mx5/Kconfig
arch/arm/mach-mx5/board-mx53_ard.c
arch/arm/mach-mx5/board-mx53_evk.c
arch/arm/mach-mx5/board-mx53_loco.c
arch/arm/mach-mx5/board-mx53_smd.c
arch/arm/mach-mx5/devices-imx53.h
arch/arm/mach-mx5/devices.c
arch/arm/plat-mxc/ahci_sata.c
arch/arm/plat-mxc/include/mach/ahci_sata.h

index 6264dd2e553f8163876f3ccd43cf4c1a39b864ee..0ca2ff235984b33b3ac571ecb68a22ba43e9e6ea 100755 (executable)
@@ -1198,6 +1198,7 @@ CONFIG_SENSORS_MAX17135=y
 # CONFIG_SENSORS_LIS3_SPI is not set
 # CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_SENSORS_MC13783_ADC is not set
+CONFIG_SENSORS_IMX_AHCI=y
 CONFIG_MXC_MMA8450=y
 CONFIG_MXC_MMA8451=y
 # CONFIG_THERMAL is not set
index 944ff0a9d1ddd81c4fb52ffa0aaddf410c8c22df..d41b560ac72e24d6884fbfabbcce32e80c6070f1 100755 (executable)
@@ -205,6 +205,7 @@ config MACH_MX53_EVK
        select IMX_HAVE_PLATFORM_MXC_GPU
        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
        select IMX_HAVE_PLATFORM_SPI_IMX
+       select IMX_HAVE_PLATFORM_AHCI
        help
          Include support for MX53 EVK platform. This includes specific
          configurations for the board and its peripherals.
@@ -246,6 +247,7 @@ config MACH_MX53_ARD
        select IMX_HAVE_PLATFORM_IMX_UART
        select IMX_HAVE_PLATFORM_MXC_GPU
        select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+       select IMX_HAVE_PLATFORM_AHCI
        help
          Include support for MX53 ARD platform. This includes specific
          configurations for the board and its peripherals.
index 101c11fcea244bcc13f04f6ee60eaad1c9b6a0c8..7ef675e50369970f140c9e87deb519239a1707ec 100755 (executable)
@@ -248,6 +248,7 @@ static void __init mx53_ard_board_init(void)
        imx53_add_imx2_wdt(0, NULL);
        imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
        imx53_add_sdhci_esdhc_imx(1, &mx53_ard_sd2_data);
+       mxc_register_device(&imx_ahci_device_hwmon, NULL);
 
        weim_cs_config();
        mx53_ard_io_init();
index cf785f9bea714e6c40091977b2d14a6f398a5386..4bc1c0c560e6ba89a136211e9f55077b055f9cb7 100755 (executable)
@@ -754,6 +754,7 @@ static void __init mx53_evk_board_init(void)
 
        imx53_add_sdhci_esdhc_imx(0, &mx53_evk_sd1_data);
        imx53_add_sdhci_esdhc_imx(2, &mx53_evk_sd3_data);
+       mxc_register_device(&imx_ahci_device_hwmon, NULL);
 
        spi_register_board_info(mx53_evk_spi_board_info,
                ARRAY_SIZE(mx53_evk_spi_board_info));
index 503c999727d23942ff72ab59b455ecff8474a337..69061d51e319ea323180dd345554aed81c59e4f3 100755 (executable)
@@ -705,6 +705,7 @@ static void __init mx53_loco_board_init(void)
        imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data);
        imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data);
        imx53_add_ahci(0, &mx53_loco_sata_data);
+       mxc_register_device(&imx_ahci_device_hwmon, NULL);
        imx53_add_iim(&iim_data);
 
        /* USB */
index a9357f094e5d5637b6c91e8061a2b9ddff6f2be6..01b197d3592152896cae6a32a36ad3320b02854b 100755 (executable)
@@ -766,6 +766,7 @@ static void __init mx53_smd_board_init(void)
        imx53_add_sdhci_esdhc_imx(1, &mx53_smd_sd2_data);
        imx53_add_sdhci_esdhc_imx(2, &mx53_smd_sd3_data);
        imx53_add_ahci(0, &mx53_smd_sata_data);
+       mxc_register_device(&imx_ahci_device_hwmon, NULL);
 
        mx53_smd_init_usb();
        imx53_add_iim(&iim_data);
index a975dba5c3453a9292269c710bab8eae2ac3ace4..cd29666c34e74987b2e39a8fa137ed5331d23dd7 100755 (executable)
@@ -105,3 +105,5 @@ extern const struct imx_spdif_dai_data imx53_spdif_dai_data __initconst;
 #define imx53_add_spdif_dai()  imx_add_spdif_dai(&imx53_spdif_dai_data)
 
 #define imx53_add_spdif_audio_device(pdata)    imx_add_spdif_audio_device()
+
+extern struct platform_device imx_ahci_device_hwmon;
index 890d311ad0b4f58a09cdfe45f420ba39d6aae51c..f6f3f68e26a82efa8b37aded93ffce338dd0c5ea 100755 (executable)
@@ -214,6 +214,11 @@ struct platform_device mxc_usbh2_wakeup_device = {
        .resource = usbh2_wakeup_resources,
 };
 
+struct platform_device imx_ahci_device_hwmon = {
+       .name           = "imx-ahci-hwmon",
+       .id             = -1,
+};
+
 static struct mxc_gpio_port mxc_gpio_ports[] = {
        {
                .chip.label = "gpio-0",
index 9dd607e9dca52283ec0ab1919d4fe191a750875d..ab4fcf86bc4cbca3fe76d7e397d09b6b170a8cf0 100644 (file)
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/kernel.h>
+#include <linux/delay.h>
 #include <mach/ahci_sata.h>
 
+int write_phy_ctl_ack_polling(u32 data, void __iomem *mmio,
+               int max_iterations, u32 exp_val)
+{
+       u32 i, val;
+
+       writel(data, mmio + PORT_PHY_CTL);
+
+       for (i = 0; i < max_iterations + 1; i++) {
+               val = readl(mmio + PORT_PHY_SR);
+               val =  (val >> PORT_PHY_STAT_ACK_LOC) & 0x1;
+               if (val == exp_val)
+                       return 0;
+               if (i == max_iterations) {
+                       printk(KERN_ERR "Wait for CR ACK error!\n");
+                       return 1;
+               }
+               usleep_range(100, 200);
+       }
+       return 0;
+}
+
+int sata_phy_cr_addr(u32 addr, void __iomem *mmio)
+{
+       u32 temp_wr_data;
+
+       /* write addr */
+       temp_wr_data = addr;
+       writel(temp_wr_data, mmio + PORT_PHY_CTL);
+
+       /* capture addr */
+       temp_wr_data |= PORT_PHY_CTL_CAP_ADR_LOC;
+
+       /* wait for ack */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 1))
+               return 1;
+
+       /* deassert cap addr */
+       temp_wr_data &= 0xffff;
+
+       /* wait for ack de-assetion */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 0))
+               return 1;
+
+       return 0;
+}
+
+int sata_phy_cr_write(u32 data, void __iomem *mmio)
+{
+       u32 temp_wr_data;
+
+       /* write data */
+       temp_wr_data = data;
+
+       /* capture data */
+       temp_wr_data |= PORT_PHY_CTL_CAP_DAT_LOC;
+
+       /* wait for ack */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 1))
+               return 1;
+
+       /* deassert cap data */
+       temp_wr_data &= 0xffff;
+
+       /* wait for ack de-assetion */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 0))
+               return 1;
+
+       /* assert wr signal */
+       temp_wr_data |= PORT_PHY_CTL_WRITE_LOC;
+
+       /* wait for ack */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 1))
+               return 1;
+
+       /* deassert wr _signal */
+       temp_wr_data = 0x0;
+
+       /* wait for ack de-assetion */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 0))
+               return 1;
+
+       return 0;
+}
+
+int sata_phy_cr_read(u32 *data, void __iomem *mmio)
+{
+       u32 temp_rd_data, temp_wr_data;
+
+       /* assert rd signal */
+       temp_wr_data = PORT_PHY_CTL_READ_LOC;
+
+       /* wait for ack */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 1))
+               return 1;
+
+       /* after got ack return data */
+       temp_rd_data = readl(mmio + PORT_PHY_SR);
+       *data = (temp_rd_data & 0xffff);
+
+       /* deassert rd _signal */
+       temp_wr_data = 0x0 ;
+
+       /* wait for ack de-assetion */
+       if (write_phy_ctl_ack_polling(temp_wr_data, mmio, 100, 0))
+               return 1;
+
+       return 0;
+}
+
 /* AHCI module Initialization, if return 0, initialization is successful. */
 int sata_init(void __iomem *addr, unsigned long timer1ms)
 {
index 21189954426b799675b88008afb29cd212c86640..edca22b4fc04f0815aa74fa7752f915f3a05c56d 100755 (executable)
@@ -52,5 +52,10 @@ enum {
        SATA_PHY_CR_CLOCK_MPLL_TST = 0x0017,
 };
 
+extern int write_phy_ctl_ack_polling(u32 data, void __iomem *mmio,
+               int max_iterations, u32 exp_val);
+extern int sata_phy_cr_addr(u32 addr, void __iomem *mmio);
+extern int sata_phy_cr_write(u32 data, void __iomem *mmio);
+extern int sata_phy_cr_read(u32 *data, void __iomem *mmio);
 extern int sata_init(void __iomem *addr, unsigned long timer1ms);
 #endif /* __PLAT_MXC_AHCI_SATA_H__ */