MIPS: Add support for the proAptiv cores

The proAptiv Multiprocessing System is a power efficient multi-core
microprocessor for use in system-on-chip (SoC) applications.
The proAptiv Multiprocessing System combines a deep pipeline
with multi-issue out of order execution for improved computational
throughput. The proAptiv Multiprocessing System can contain one to
six MIPS32r3 proAptiv cores, system level coherence
manager with L2 cache, optional coherent I/O port, and optional
floating point unit.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6134/

diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 71d36ff999328138b205b6047cbb1344b2c4f98b..00413508da99939d4f5f3e362a73afb1d3a1ca71 100644 (file)
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -44,6 +44,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
        case CPU_74K:
        case CPU_M14KC:
        case CPU_M14KEC:
+       case CPU_PROAPTIV:
 #endif
 
 #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index e448caa24f85261fdf83ba4112b7f45e983541f7..f990247dd88d75aac0a0254f5c75a1c165579bc7 100644 (file)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -293,7 +293,7 @@ enum cpu_type_enum {
        CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
        CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
        CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC,
-       CPU_M14KEC,
+       CPU_M14KEC, CPU_PROAPTIV,
 
        /*
         * MIPS64 class processors

diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index f7991d95bff9a67374501ee4b3ce5f3c25973742..cb2c94f13d01d3bdca94af5a03e229d0d7c17331 100644 (file)
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -184,6 +184,7 @@ void __init check_wait(void)
        case CPU_24K:
        case CPU_34K:
        case CPU_1004K:
+       case CPU_PROAPTIV:
                cpu_wait = r4k_wait;
                if (read_c0_config7() & MIPS_CONF7_WII)
                        cpu_wait = r4k_wait_irqoff;

diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 93f86817f20a64aae37b136d7fa3f2429e18852b..fb72b803b754bde19987a0fbbb50ec6c51d13b1f 100644 (file)
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -206,6 +206,7 @@ void spram_config(void)
        case CPU_34K:
        case CPU_74K:
        case CPU_1004K:
+       case CPU_PROAPTIV:
                config0 = read_c0_config();
                /* FIXME: addresses are Malta specific */
                if (config0 & (1<<24)) {

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 5afe9a3811db9821f8bb2e983773901059dde568..e9579856557c82d1d9106da9c5785e803d564475 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1336,6 +1336,7 @@ static inline void parity_protection_init(void)
        case CPU_34K:
        case CPU_74K:
        case CPU_1004K:
+       case CPU_PROAPTIV:
                {
 #define ERRCTL_PE      0x80000000
 #define ERRCTL_L2P     0x00800000

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index a4e1a692e45adc2323ca442402ba9aaa5838fdb8..eded642e1fefabad6d4a96519cc75d93370f68dc 100644 (file)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1106,6 +1106,7 @@ static void probe_pcache(void)
        case CPU_34K:
        case CPU_74K:
        case CPU_1004K:
+       case CPU_PROAPTIV:
                if (current_cpu_type() == CPU_74K)
                        alias_74k_erratum(c);
                if ((read_c0_config7() & (1 << 16))) {

diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 08d05aee8788beecdf0a6e3cc8d21ee3901e17da..317c2497a75c97d9c9f530b681ff0547287dbd26 100644 (file)
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -76,6 +76,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
        case CPU_34K:
        case CPU_74K:
        case CPU_1004K:
+       case CPU_PROAPTIV:
        case CPU_BMIPS5000:
                if (config2 & (1 << 12))
                        return 0;

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 183f2b583e4dbc7798411c4fd8c6c3927bff607f..6fdfe1fadc91a9fabb0ca1aee5b0d78159b799a8 100644 (file)
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -510,6 +510,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
                switch (current_cpu_type()) {
                case CPU_M14KC:
                case CPU_74K:
+               case CPU_PROAPTIV:
                        break;
 
                default:

diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index 4d1736fc19557b793fd707f2543500a043bf6488..efd2eb3d92e31d941e8c1d9fcedc974574bf0660 100644 (file)
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -86,6 +86,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        case CPU_34K:
        case CPU_1004K:
        case CPU_74K:
+       case CPU_PROAPTIV:
        case CPU_LOONGSON1:
        case CPU_SB1:
        case CPU_SB1A:

diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 3a2b6e9f25cfb95ab0f2f5ee1eeccf069bde8f22..3e28aaa39bc9e2ba435980a324b89cf58d89d728 100644 (file)
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -376,6 +376,10 @@ static int __init mipsxx_init(void)
                op_model_mipsxx_ops.cpu_type = "mips/74K";
                break;
 
+       case CPU_PROAPTIV:
+               op_model_mipsxx_ops.cpu_type = "mips/proAptiv";
+               break;
+
        case CPU_5KC:
                op_model_mipsxx_ops.cpu_type = "mips/5K";
                break;