ath9k_hw: Update AR9485 initvals to fix system hang issue

commit 98fb2cc115b4ef1ea0a2d87a170c183bd395dd6c upstream.

This patch fixes system hang when resuming from S3 state
and lower rate sens failure issue.

Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
index 611ea6ce8508dfb760a1172ea46793e6716c48e3..d16d029f81a9db1d45dbd7f0115e057d3be3bf1d 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
@@ -521,7 +521,7 @@ static const u32 ar9485_1_1_radio_postamble[][2] = {
        {0x000160ac, 0x24611800},
        {0x000160b0, 0x03284f3e},
        {0x0001610c, 0x00170000},
-       {0x00016140, 0x10804008},
+       {0x00016140, 0x50804008},
 };
 
 static const u32 ar9485_1_1_mac_postamble[][5] = {
@@ -603,7 +603,7 @@ static const u32 ar9485_1_1_radio_core[][2] = {
 
 static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
        /* Addr        allmodes */
-       {0x00018c00, 0x10052e5e},
+       {0x00018c00, 0x18052e5e},
        {0x00018c04, 0x000801d8},
        {0x00018c08, 0x0000080c},
 };
@@ -776,7 +776,7 @@ static const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5] = {
 
 static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
        /* Addr        allmodes */
-       {0x00018c00, 0x10013e5e},
+       {0x00018c00, 0x18013e5e},
        {0x00018c04, 0x000801d8},
        {0x00018c08, 0x0000080c},
 };
@@ -882,7 +882,7 @@ static const u32 ar9485_fast_clock_1_1_baseband_postamble[][3] = {
 
 static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
        /* Addr        allmodes  */
-       {0x00018c00, 0x10012e5e},
+       {0x00018c00, 0x18012e5e},
        {0x00018c04, 0x000801d8},
        {0x00018c08, 0x0000080c},
 };
@@ -1021,7 +1021,7 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {
 
 static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
        /* Addr        allmodes */
-       {0x00018c00, 0x10053e5e},
+       {0x00018c00, 0x18053e5e},
        {0x00018c04, 0x000801d8},
        {0x00018c08, 0x0000080c},
 };