]> git.karo-electronics.de Git - linux-beck.git/commitdiff
arm64: KVM: Add access handler for PMCR register
authorShannon Zhao <shannon.zhao@linaro.org>
Thu, 18 Jun 2015 08:01:53 +0000 (16:01 +0800)
committerMarc Zyngier <marc.zyngier@arm.com>
Mon, 29 Feb 2016 18:34:19 +0000 (18:34 +0000)
Add reset handler which gets host value of PMCR_EL0 and make writable
bits architecturally UNKNOWN except PMCR.E which is zero. Add an access
handler for PMCR.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/include/asm/kvm_host.h
arch/arm64/kvm/sys_regs.c
include/kvm/arm_pmu.h

index fb57fdc6a433d31bdc0a8c4dc7064702db942440..5def605b45259796895d56f894ad5a0e8bc5a69b 100644 (file)
@@ -117,6 +117,9 @@ enum vcpu_sysreg {
        MDSCR_EL1,      /* Monitor Debug System Control Register */
        MDCCINT_EL1,    /* Monitor Debug Comms Channel Interrupt Enable Reg */
 
+       /* Performance Monitors Registers */
+       PMCR_EL0,       /* Control Register */
+
        /* 32bit specific registers. Keep them at the end of the range */
        DACR32_EL2,     /* Domain Access Control Register */
        IFSR32_EL2,     /* Instruction Fault Status Register */
index 2e90371cfb378b0e064667506a2b74c9275cacfb..e88ae2d809a5558f51872a3977b052248b0be0d4 100644 (file)
@@ -34,6 +34,7 @@
 #include <asm/kvm_emulate.h>
 #include <asm/kvm_host.h>
 #include <asm/kvm_mmu.h>
+#include <asm/perf_event.h>
 
 #include <trace/events/kvm.h>
 
@@ -439,6 +440,43 @@ static void reset_mpidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
        vcpu_sys_reg(vcpu, MPIDR_EL1) = (1ULL << 31) | mpidr;
 }
 
+static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
+{
+       u64 pmcr, val;
+
+       asm volatile("mrs %0, pmcr_el0\n" : "=r" (pmcr));
+       /* Writable bits of PMCR_EL0 (ARMV8_PMU_PMCR_MASK) is reset to UNKNOWN
+        * except PMCR.E resetting to zero.
+        */
+       val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
+              | (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
+       vcpu_sys_reg(vcpu, PMCR_EL0) = val;
+}
+
+static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
+                       const struct sys_reg_desc *r)
+{
+       u64 val;
+
+       if (!kvm_arm_pmu_v3_ready(vcpu))
+               return trap_raz_wi(vcpu, p, r);
+
+       if (p->is_write) {
+               /* Only update writeable bits of PMCR */
+               val = vcpu_sys_reg(vcpu, PMCR_EL0);
+               val &= ~ARMV8_PMU_PMCR_MASK;
+               val |= p->regval & ARMV8_PMU_PMCR_MASK;
+               vcpu_sys_reg(vcpu, PMCR_EL0) = val;
+       } else {
+               /* PMCR.P & PMCR.C are RAZ */
+               val = vcpu_sys_reg(vcpu, PMCR_EL0)
+                     & ~(ARMV8_PMU_PMCR_P | ARMV8_PMU_PMCR_C);
+               p->regval = val;
+       }
+
+       return true;
+}
+
 /* Silly macro to expand the DBG{BCR,BVR,WVR,WCR}n_EL1 registers in one go */
 #define DBG_BCR_BVR_WCR_WVR_EL1(n)                                     \
        /* DBGBVRn_EL1 */                                               \
@@ -623,7 +661,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 
        /* PMCR_EL0 */
        { Op0(0b11), Op1(0b011), CRn(0b1001), CRm(0b1100), Op2(0b000),
-         trap_raz_wi },
+         access_pmcr, reset_pmcr, },
        /* PMCNTENSET_EL0 */
        { Op0(0b11), Op1(0b011), CRn(0b1001), CRm(0b1100), Op2(0b001),
          trap_raz_wi },
@@ -885,7 +923,7 @@ static const struct sys_reg_desc cp15_regs[] = {
        { Op1( 0), CRn( 7), CRm(14), Op2( 2), access_dcsw },
 
        /* PMU */
-       { Op1( 0), CRn( 9), CRm(12), Op2( 0), trap_raz_wi },
+       { Op1( 0), CRn( 9), CRm(12), Op2( 0), access_pmcr },
        { Op1( 0), CRn( 9), CRm(12), Op2( 1), trap_raz_wi },
        { Op1( 0), CRn( 9), CRm(12), Op2( 2), trap_raz_wi },
        { Op1( 0), CRn( 9), CRm(12), Op2( 3), trap_raz_wi },
index 3c2fd568e0a811b30d2f23326c4b4e5cb978ad77..8157fe5bcbb0ea303b3d492bd2a88ee7d0423cde 100644 (file)
@@ -34,9 +34,13 @@ struct kvm_pmu {
        struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
        bool ready;
 };
+
+#define kvm_arm_pmu_v3_ready(v)                ((v)->arch.pmu.ready)
 #else
 struct kvm_pmu {
 };
+
+#define kvm_arm_pmu_v3_ready(v)                (false)
 #endif
 
 #endif