]> git.karo-electronics.de Git - linux-beck.git/commitdiff
clk: spear: Remove CLK_IS_ROOT
authorStephen Boyd <sboyd@codeaurora.org>
Tue, 1 Mar 2016 19:00:00 +0000 (11:00 -0800)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 3 Mar 2016 01:46:55 +0000 (17:46 -0800)
This flag is a no-op now. Remove usage of the flag.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/spear/spear1310_clock.c
drivers/clk/spear/spear1340_clock.c
drivers/clk/spear/spear3xx_clock.c
drivers/clk/spear/spear6xx_clock.c

index 009bd1410cfa87759d6aa3c224dbd3a1c64e832f..2f86e3f94efa6f2fe306fbbecd581bd70e4b392e 100644 (file)
@@ -386,24 +386,20 @@ void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
 {
        struct clk *clk, *clk1;
 
-       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-                       32000);
+       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
        clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,
-                       24000000);
+       clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
        clk_register_clkdev(clk, "osc_24m_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT,
-                       25000000);
+       clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
        clk_register_clkdev(clk, "osc_25m_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT,
-                       125000000);
+       clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
        clk_register_clkdev(clk, "gmii_pad_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,
-                       CLK_IS_ROOT, 12288000);
+       clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
+                                     12288000);
        clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);
 
        /* clock derived from 32 KHz osc clk */
@@ -897,11 +893,10 @@ void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
                        &_lock);
        clk_register_clkdev(clk, "ras_apb_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, CLK_IS_ROOT,
+       clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, 0,
                        50000000);
 
-       clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, CLK_IS_ROOT,
-                       50000000);
+       clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, 0, 50000000);
 
        clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN0_CLK_ENB, 0,
index 9c7abfd951baa2fa91950dd0e4b0a2a76f8fecb5..cbb19a90f2d614569f48ad7ffec1c287714e5810 100644 (file)
@@ -443,24 +443,20 @@ void __init spear1340_clk_init(void __iomem *misc_base)
 {
        struct clk *clk, *clk1;
 
-       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-                       32000);
+       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
        clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,
-                       24000000);
+       clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
        clk_register_clkdev(clk, "osc_24m_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT,
-                       25000000);
+       clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
        clk_register_clkdev(clk, "osc_25m_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT,
-                       125000000);
+       clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
        clk_register_clkdev(clk, "gmii_pad_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,
-                       CLK_IS_ROOT, 12288000);
+       clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
+                                     12288000);
        clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);
 
        /* clock derived from 32 KHz osc clk */
index 404a55edd613d102f00bda3e127f7125b07fed88..c403c66b6583d15c90bd2f6473368d6bbcc25b6b 100644 (file)
@@ -251,7 +251,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
        struct clk *clk;
 
        clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,
-                       CLK_IS_ROOT, 125000000);
+                       0, 125000000);
        clk_register_clkdev(clk, "smii_125m_pad", NULL);
 
        clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,
@@ -391,12 +391,10 @@ void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_
 {
        struct clk *clk, *clk1, *ras_apb_clk;
 
-       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-                       32000);
+       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
        clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,
-                       24000000);
+       clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
        clk_register_clkdev(clk, "osc_24m_clk", NULL);
 
        /* clock derived from 32 KHz osc clk */
index e24f85cd4300f39845f8bd8dd065ee5fceb1940b..7c9383c3c2c6085ab4e2ae18dff0b8e3df8ee372 100644 (file)
@@ -117,12 +117,10 @@ void __init spear6xx_clk_init(void __iomem *misc_base)
 {
        struct clk *clk, *clk1;
 
-       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
-                       32000);
+       clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
        clk_register_clkdev(clk, "osc_32k_clk", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, CLK_IS_ROOT,
-                       30000000);
+       clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, 0, 30000000);
        clk_register_clkdev(clk, "osc_30m_clk", NULL);
 
        /* clock derived from 32 KHz osc clk */