obj-$(CONFIG_MACH_NETSPACE_MAX_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_NETSPACE_MINI_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_NETSPACE_V2_DT) += board-ns2.o
-obj-$(CONFIG_MACH_NSA310_DT) += board-nsa310.o
obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT) += board-openblocks_a6.o
obj-$(CONFIG_MACH_READYNAS_DT) += board-readynas.o
+ obj-$(CONFIG_MACH_SHEEVAPLUG_DT) += board-sheevaplug.o
obj-$(CONFIG_MACH_TOPKICK_DT) += board-usi_topkick.o
obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
};
+static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
+
+ /* SDHI */
+ static struct sh_mobile_sdhi_info sdhi0_info = {
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED,
+ .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
+ };
+
static const struct pinctrl_map bockw_pinctrl_map[] = {
/* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_data_a", "scif0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_ctrl", "scif0"),
++
++ /* EHCI */
+ PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
+ "usb0", "usb0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
+ "usb1", "usb1"),
+ /* SDHI0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
+ "sdhi0", "sdhi0"),
};
+ #define FPGA 0x18200000
#define IRQ0MR 0x30
+ #define PFC 0xfffc0000
+ #define PUPR4 0x110
static void __init bockw_init(void)
{
- void __iomem *fpga;
+ void __iomem *base;
r8a7778_clock_init();
r8a7778_init_irq_extpin(1);
pinctrl_register_mappings(marzen_pinctrl_map,
ARRAY_SIZE(marzen_pinctrl_map));
r8a7779_pinmux_init();
+ r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
r8a7779_add_standard_devices();
+ r8a7779_add_usb_phy_device(&usb_phy_platform_data);
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
}