ARM: OMAP2+: DRA7: Add hwmod entries for PWMSS

Add hwmod entries for the PWMSS on DRA7.

Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).

Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Do not add eQEP, ePWM and eCAP hwmod entries]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
[paul@pwsan.com: fixed sparse warnings; added missing comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 7610f3ef28b7c45832b1ec396636bcf5718cd061..2f15cf13e0d7a81c64da0dd4be89d1887a20ff04 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -383,6 +383,68 @@ static struct omap_hwmod dra7xx_dcan2_hwmod = {
        },
 };
 
+/* pwmss  */
+static struct omap_hwmod_class_sysconfig dra7xx_epwmss_sysc = {
+       .rev_offs       = 0x0,
+       .sysc_offs      = 0x4,
+       .sysc_flags     = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET,
+       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+       .sysc_fields    = &omap_hwmod_sysc_type2,
+};
+
+/*
+ * epwmss class
+ */
+static struct omap_hwmod_class dra7xx_epwmss_hwmod_class = {
+       .name           = "epwmss",
+       .sysc           = &dra7xx_epwmss_sysc,
+};
+
+/* epwmss0 */
+static struct omap_hwmod dra7xx_epwmss0_hwmod = {
+       .name           = "epwmss0",
+       .class          = &dra7xx_epwmss_hwmod_class,
+       .clkdm_name     = "l4per2_clkdm",
+       .main_clk       = "l4_root_clk_div",
+       .prcm           = {
+               .omap4  = {
+                       .modulemode     = MODULEMODE_SWCTRL,
+                       .clkctrl_offs   = DRA7XX_CM_L4PER2_PWMSS1_CLKCTRL_OFFSET,
+                       .context_offs   = DRA7XX_RM_L4PER2_PWMSS1_CONTEXT_OFFSET,
+               },
+       },
+};
+
+/* epwmss1 */
+static struct omap_hwmod dra7xx_epwmss1_hwmod = {
+       .name           = "epwmss1",
+       .class          = &dra7xx_epwmss_hwmod_class,
+       .clkdm_name     = "l4per2_clkdm",
+       .main_clk       = "l4_root_clk_div",
+       .prcm           = {
+               .omap4  = {
+                       .modulemode     = MODULEMODE_SWCTRL,
+                       .clkctrl_offs   = DRA7XX_CM_L4PER2_PWMSS2_CLKCTRL_OFFSET,
+                       .context_offs   = DRA7XX_RM_L4PER2_PWMSS2_CONTEXT_OFFSET,
+               },
+       },
+};
+
+/* epwmss2 */
+static struct omap_hwmod dra7xx_epwmss2_hwmod = {
+       .name           = "epwmss2",
+       .class          = &dra7xx_epwmss_hwmod_class,
+       .clkdm_name     = "l4per2_clkdm",
+       .main_clk       = "l4_root_clk_div",
+       .prcm           = {
+               .omap4  = {
+                       .modulemode     = MODULEMODE_SWCTRL,
+                       .clkctrl_offs   = DRA7XX_CM_L4PER2_PWMSS3_CLKCTRL_OFFSET,
+                       .context_offs   = DRA7XX_RM_L4PER2_PWMSS3_CONTEXT_OFFSET,
+               },
+       },
+};
+
 /*
  * 'dma' class
  *
@@ -3693,6 +3755,30 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__wd_timer2 = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per2 -> epwmss0 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__epwmss0 = {
+       .master         = &dra7xx_l4_per2_hwmod,
+       .slave          = &dra7xx_epwmss0_hwmod,
+       .clk            = "l4_root_clk_div",
+       .user           = OCP_USER_MPU,
+};
+
+/* l4_per2 -> epwmss1 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__epwmss1 = {
+       .master         = &dra7xx_l4_per2_hwmod,
+       .slave          = &dra7xx_epwmss1_hwmod,
+       .clk            = "l4_root_clk_div",
+       .user           = OCP_USER_MPU,
+};
+
+/* l4_per2 -> epwmss2 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__epwmss2 = {
+       .master         = &dra7xx_l4_per2_hwmod,
+       .slave          = &dra7xx_epwmss2_hwmod,
+       .clk            = "l4_root_clk_div",
+       .user           = OCP_USER_MPU,
+};
+
 static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l3_main_1__dmm,
        &dra7xx_l3_main_2__l3_instr,
@@ -3814,6 +3900,9 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l3_main_1__vcp2,
        &dra7xx_l4_per2__vcp2,
        &dra7xx_l4_wkup__wd_timer2,
+       &dra7xx_l4_per2__epwmss0,
+       &dra7xx_l4_per2__epwmss1,
+       &dra7xx_l4_per2__epwmss2,
        NULL,
 };