]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ARM: at91: make DBGU soc independent
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tue, 1 Nov 2011 17:43:31 +0000 (01:43 +0800)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tue, 15 Nov 2011 17:55:41 +0000 (01:55 +0800)
we will select now the DBGU used by the soc at Kconfig level

For the DEBUG_LL and early_printk this will allow to select which DBGU to use
this will also allow to select them when multiple SOC are enabled

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
20 files changed:
arch/arm/mach-at91/Kconfig
arch/arm/mach-at91/at91cap9_devices.c
arch/arm/mach-at91/at91rm9200_devices.c
arch/arm/mach-at91/at91sam9260_devices.c
arch/arm/mach-at91/at91sam9261_devices.c
arch/arm/mach-at91/at91sam9263_devices.c
arch/arm/mach-at91/at91sam9g45_devices.c
arch/arm/mach-at91/at91sam9rl_devices.c
arch/arm/mach-at91/include/mach/at91_dbgu.h
arch/arm/mach-at91/include/mach/at91cap9.h
arch/arm/mach-at91/include/mach/at91rm9200.h
arch/arm/mach-at91/include/mach/at91sam9260.h
arch/arm/mach-at91/include/mach/at91sam9261.h
arch/arm/mach-at91/include/mach/at91sam9263.h
arch/arm/mach-at91/include/mach/at91sam9g45.h
arch/arm/mach-at91/include/mach/at91sam9rl.h
arch/arm/mach-at91/include/mach/debug-macro.S
arch/arm/mach-at91/include/mach/hardware.h
arch/arm/mach-at91/include/mach/uncompress.h
arch/arm/mach-at91/setup.c

index d111c3e9924986d206d0df439d12674e0a4855c8..fc3146f559e69b0326cf391c5000c40ad547393a 100644 (file)
@@ -3,6 +3,12 @@ if ARCH_AT91
 config HAVE_AT91_DATAFLASH_CARD
        bool
 
+config HAVE_AT91_DBGU0
+       bool
+
+config HAVE_AT91_DBGU1
+       bool
+
 config HAVE_AT91_USART3
        bool
 
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200
        bool "AT91RM9200"
        select CPU_ARM920T
        select GENERIC_CLOCKEVENTS
+       select HAVE_AT91_DBGU0
        select HAVE_AT91_USART3
 
 config ARCH_AT91SAM9260
        bool "AT91SAM9260 or AT91SAM9XE"
        select CPU_ARM926T
        select GENERIC_CLOCKEVENTS
+       select HAVE_AT91_DBGU0
        select HAVE_AT91_USART3
        select HAVE_AT91_USART4
        select HAVE_AT91_USART5
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
        select CPU_ARM926T
        select GENERIC_CLOCKEVENTS
        select HAVE_FB_ATMEL
+       select HAVE_AT91_DBGU0
 
 config ARCH_AT91SAM9G10
        bool "AT91SAM9G10"
        select CPU_ARM926T
        select GENERIC_CLOCKEVENTS
+       select HAVE_AT91_DBGU0
        select HAVE_FB_ATMEL
 
 config ARCH_AT91SAM9263
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
        select GENERIC_CLOCKEVENTS
        select HAVE_FB_ATMEL
        select HAVE_NET_MACB
+       select HAVE_AT91_DBGU1
 
 config ARCH_AT91SAM9RL
        bool "AT91SAM9RL"
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
        select GENERIC_CLOCKEVENTS
        select HAVE_AT91_USART3
        select HAVE_FB_ATMEL
+       select HAVE_AT91_DBGU0
 
 config ARCH_AT91SAM9G20
        bool "AT91SAM9G20"
        select CPU_ARM926T
        select GENERIC_CLOCKEVENTS
+       select HAVE_AT91_DBGU0
        select HAVE_AT91_USART3
        select HAVE_AT91_USART4
        select HAVE_AT91_USART5
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
        select HAVE_AT91_USART3
        select HAVE_FB_ATMEL
        select HAVE_NET_MACB
+       select HAVE_AT91_DBGU1
 
 config ARCH_AT91CAP9
        bool "AT91CAP9"
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9
        select GENERIC_CLOCKEVENTS
        select HAVE_FB_ATMEL
        select HAVE_NET_MACB
+       select HAVE_AT91_DBGU1
 
 config ARCH_AT91X40
        bool "AT91x40"
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ
 choice
        prompt "Select a UART for early kernel messages"
 
-config AT91_EARLY_DBGU
-       bool "DBGU"
+config AT91_EARLY_DBGU0
+       bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
+       depends on HAVE_AT91_DBGU0
+
+config AT91_EARLY_DBGU1
+       bool "DBGU on 9263, 9g45 and cap9"
+       depends on HAVE_AT91_DBGU1
 
 config AT91_EARLY_USART0
        bool "USART0"
@@ -537,6 +557,20 @@ config AT91_EARLY_USART5
 
 endchoice
 
+choice
+       prompt "Select a DBGU for DEBUG_LL"
+       depends on DEBUG_LL
+
+config AT91_DEBUG_LL_DBGU0
+       bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
+       depends on HAVE_AT91_DBGU0
+
+config AT91_DEBUG_LL_DBGU1
+       bool "DBGU on 9263, 9g45 and cap9"
+       depends on HAVE_AT91_DBGU1
+
+endchoice
+
 endmenu
 
 endif
index 019dac047b91c8458565c8a38e8dfb835225608f..19975cfb00cd0c18779b8db9f238d2cc80dd473e 100644 (file)
@@ -1030,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91CAP9_BASE_DBGU,
+               .end    = AT91CAP9_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index 66591fa53e057d59011a533a2037cfc976116790..1007ba8ec1313400521948506b1f17018ec41803 100644 (file)
@@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91RM9200_BASE_DBGU,
+               .end    = AT91RM9200_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index 9cdaffa0d6b19eb975f200d6a17d94fd299f2460..5b424fcc9c8cab90fe3628b644050772efa67b21 100644 (file)
@@ -846,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91SAM9260_BASE_DBGU,
+               .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index c59e1e9a4f5c777765b33f0317f0894e74cf9756..e5cff1d902d01ef6f2411025ba4d2362101bea28 100644 (file)
@@ -825,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91SAM9261_BASE_DBGU,
+               .end    = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index b5f4e2532fdb541c6b811707def74c1425e4a058..20e681c6b404ab403f68894858282e2692e924ae 100644 (file)
@@ -1205,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91SAM9263_BASE_DBGU,
+               .end    = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index 3b91706e4f7dc14a03d1e5fe727c45c44e6a83ee..153dad0642c63bd35f879bbc309b425b86ee02aa 100644 (file)
@@ -1341,8 +1341,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91SAM9G45_BASE_DBGU,
+               .end    = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index c7961b446dd86c123fb45456129c116e4117056f..366c1cfd4f772a585a261da3e581c2af7ac77eaa 100644 (file)
@@ -917,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SYS + AT91_DBGU,
-               .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+               .start  = AT91SAM9RL_BASE_DBGU,
+               .end    = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
index dbfe455a4c410a1dab1756b967acbf6dd15ddaec..2aa0c5e134953e35350dcfebec43f2946452e3e9 100644 (file)
@@ -19,7 +19,7 @@
 #define dbgu_readl(dbgu, field) \
        __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
 
-#ifdef AT91_DBGU
+#if !defined(CONFIG_ARCH_AT91X40)
 #define AT91_DBGU_CR           (0x00)  /* Control Register */
 #define AT91_DBGU_MR           (0x04)  /* Mode Register */
 #define AT91_DBGU_IER          (0x08)  /* Interrupt Enable Register */
index 750ba85614ca2f552072bf18b8f77235d8d8033d..bca2b54de73efe980376a1fdb7f876b5b300cb3a 100644 (file)
@@ -82,7 +82,6 @@
 #define AT91_BCRAMC    (0xffffe400 - AT91_BASE_SYS)
 #define AT91_DDRSDRC0  (0xffffe600 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
@@ -93,6 +92,7 @@
 #define AT91CAP9_BASE_ECC      0xffffe200
 #define AT91CAP9_BASE_DMA      0xffffec00
 #define AT91CAP9_BASE_SMC      0xffffe800
+#define AT91CAP9_BASE_DBGU     AT91_BASE_DBGU1
 #define AT91CAP9_BASE_PIOA     0xfffff200
 #define AT91CAP9_BASE_PIOB     0xfffff400
 #define AT91CAP9_BASE_PIOC     0xfffff600
index 57409549585fee5e7e617b86ad343d5bd6521c4d..1f767e28ea50ae3c91d43f1c359627f5df98115d 100644 (file)
  * System Peripherals (offset from AT91_BASE_SYS)
  */
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)    /* Advanced Interrupt Controller */
-#define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)    /* Debug Unit */
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)    /* Power Management Controller */
 #define AT91_ST                (0xfffffd00 - AT91_BASE_SYS)    /* System Timer */
 #define AT91_RTC       (0xfffffe00 - AT91_BASE_SYS)    /* Real-Time Clock */
 #define AT91_MC                (0xffffff00 - AT91_BASE_SYS)    /* Memory Controllers */
 
+#define AT91RM9200_BASE_DBGU   AT91_BASE_DBGU0 /* Debug Unit */
 #define AT91RM9200_BASE_PIOA   0xfffff400      /* PIO Controller A */
 #define AT91RM9200_BASE_PIOB   0xfffff600      /* PIO Controller B */
 #define AT91RM9200_BASE_PIOC   0xfffff800      /* PIO Controller C */
index 05860c5eb548b3192c40a31c0e96bc3689a03baf..e360d6665437ab1ff0a33c6f7d7e73a08135df6a 100644 (file)
 #define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
 
 #define AT91SAM9260_BASE_ECC   0xffffe800
 #define AT91SAM9260_BASE_SMC   0xffffec00
+#define AT91SAM9260_BASE_DBGU  AT91_BASE_DBGU0
 #define AT91SAM9260_BASE_PIOA  0xfffff400
 #define AT91SAM9260_BASE_PIOB  0xfffff600
 #define AT91SAM9260_BASE_PIOC  0xfffff800
index df2ddfd2d22eff960b4aa74c5f9f55672be9fa05..2ccc8a53985b7d96feb5bfd9959cfc2bb4654b1a 100644 (file)
 #define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
 
 #define AT91SAM9261_BASE_SMC   0xffffec00
+#define AT91SAM9261_BASE_DBGU  AT91_BASE_DBGU0
 #define AT91SAM9261_BASE_PIOA  0xfffff400
 #define AT91SAM9261_BASE_PIOB  0xfffff600
 #define AT91SAM9261_BASE_PIOC  0xfffff800
index 0eb614eb2fa6d0443b6de73f72e28e8b151f4164..aee137ba5bcfc108af4f4581b143a3fc1e11912a 100644 (file)
@@ -77,7 +77,6 @@
 #define AT91_SDRAMC0   (0xffffe200 - AT91_BASE_SYS)
 #define AT91_SDRAMC1   (0xffffe800 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffec00 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
@@ -87,6 +86,7 @@
 #define AT91SAM9263_BASE_SMC0  0xffffe400
 #define AT91SAM9263_BASE_ECC1  0xffffe600
 #define AT91SAM9263_BASE_SMC1  0xffffea00
+#define AT91SAM9263_BASE_DBGU  AT91_BASE_DBGU1
 #define AT91SAM9263_BASE_PIOA  0xfffff200
 #define AT91SAM9263_BASE_PIOB  0xfffff400
 #define AT91SAM9263_BASE_PIOC  0xfffff600
index 65098c32310146304b0759b8930651ed41afd2cd..211721b790a777146728d15737307692dfa8e796 100644 (file)
@@ -89,7 +89,6 @@
 #define AT91_DDRSDRC1  (0xffffe400 - AT91_BASE_SYS)
 #define AT91_DDRSDRC0  (0xffffe600 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
@@ -99,6 +98,7 @@
 #define AT91SAM9G45_BASE_ECC   0xffffe200
 #define AT91SAM9G45_BASE_DMA   0xffffec00
 #define AT91SAM9G45_BASE_SMC   0xffffe800
+#define AT91SAM9G45_BASE_DBGU  AT91_BASE_DBGU1
 #define AT91SAM9G45_BASE_PIOA  0xfffff200
 #define AT91SAM9G45_BASE_PIOB  0xfffff400
 #define AT91SAM9G45_BASE_PIOC  0xfffff600
index 46e136d3ef3f21154df003011f1bf4989b863ef3..4f7367a53f045642b71065477565f4e4576d02be 100644 (file)
@@ -72,7 +72,6 @@
 #define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_SCKCR     (0xfffffd50 - AT91_BASE_SYS)
@@ -82,6 +81,7 @@
 #define AT91SAM9RL_BASE_DMA    0xffffe600
 #define AT91SAM9RL_BASE_ECC    0xffffe800
 #define AT91SAM9RL_BASE_SMC    0xffffec00
+#define AT91SAM9RL_BASE_DBGU   AT91_BASE_DBGU0
 #define AT91SAM9RL_BASE_PIOA   0xfffff400
 #define AT91SAM9RL_BASE_PIOB   0xfffff600
 #define AT91SAM9RL_BASE_PIOC   0xfffff800
index 0ed8648c6452eba116ee8ed321442ae44d53fc73..c6bb9e2d9baa5c3d24f84b0f96584b66de35f4ca 100644 (file)
 #include <mach/hardware.h>
 #include <mach/at91_dbgu.h>
 
+#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
+#define AT91_DBGU AT91_BASE_DBGU0
+#else
+#define AT91_DBGU AT91_BASE_DBGU1
+#endif
+
        .macro  addruart, rp, rv, tmp
-       ldr     \rp, =(AT91_BASE_SYS + AT91_DBGU)       @ System peripherals (phys address)
-       ldr     \rv, =(AT91_VA_BASE_SYS + AT91_DBGU)    @ System peripherals (virt address)
+       ldr     \rp, =AT91_DBGU                         @ System peripherals (phys address)
+       ldr     \rv, =AT91_IO_P2V(AT91_DBGU)            @ System peripherals (virt address)
        .endm
 
        .macro  senduart,rd,rx
index 483478d8be6b06ccf7debddb61ac8a2b26145918..435764ee849065c198650eafd1dd0c17a674747b 100644 (file)
 
 #include <asm/sizes.h>
 
+/* DBGU base */
+/* rm9200, 9260/9g20, 9261/9g10, 9rl */
+#define AT91_BASE_DBGU0        0xfffff200
+/* 9263, 9g45, cap9 */
+#define AT91_BASE_DBGU1        0xffffee00
+
 #if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200.h>
 #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
index 18bdcdeb474fb74713d9bcb7bd6a75bd6a2dd7c9..0234fd9d20d6f13dc81f6e98984a22e954b03aeb 100644 (file)
 #include <linux/io.h>
 #include <linux/atmel_serial.h>
 
-#if defined(CONFIG_AT91_EARLY_DBGU)
-#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
+#if defined(CONFIG_AT91_EARLY_DBGU0)
+#define UART_OFFSET AT91_BASE_DBGU0
+#elif defined(CONFIG_AT91_EARLY_DBGU1)
+#define UART_OFFSET AT91_BASE_DBGU1
 #elif defined(CONFIG_AT91_EARLY_USART0)
 #define UART_OFFSET AT91_USART0
 #elif defined(CONFIG_AT91_EARLY_USART1)
index 5b4a260e14a64094f88629309072c91002f262a8..3c309dc59e6f137577abb9f80ef23c18cf65ec0d 100644 (file)
@@ -93,9 +93,6 @@ void at91_iounmap(volatile void __iomem *addr)
 }
 EXPORT_SYMBOL(at91_iounmap);
 
-#define AT91_DBGU0     0xfffff200
-#define AT91_DBGU1     0xffffee00
-
 static void __init soc_detect(u32 dbgu_base)
 {
        u32 cidr, socid;
@@ -268,9 +265,9 @@ void __init at91_map_io(void)
        at91_soc_initdata.type = AT91_SOC_NONE;
        at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 
-       soc_detect(AT91_DBGU0);
+       soc_detect(AT91_BASE_DBGU0);
        if (!at91_soc_is_detected())
-               soc_detect(AT91_DBGU1);
+               soc_detect(AT91_BASE_DBGU1);
 
        if (!at91_soc_is_detected())
                panic("AT91: Impossible to detect the SOC type");