iommu/omap: Enable bus-error back on supported iommus

The remoteproc MMUs in OMAP4+ SoCs have some additional debug
registers that can give out the PC value in addition to the
MMU fault address. The PC value can be extracted properly only
on the DSP cores, and is not available on the ARM processors
within the IPU sub-systems. Instead, the MMUs have been enhanced
to throw a bus-error response back to the IPU processors.

This functionality is programmable through the MMU_GP_REG register.
The cores are simply stalled if the MMU_GP_REG.BUS_ERR_BACK_EN bit
is not set. When set, a bus-error exception is raised allowing the
processor to handle it as a bus fault and provide additional debug
information. This feature is turned on by default by the driver on
iommus supporting it.

Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>

diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index eb73ef2b6fa9ebae9d75f495680e0d244761afa8..28bc631432790bde5bba70261a85865a73fd576a 100644 (file)
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -961,6 +961,8 @@ static int omap_iommu_probe(struct platform_device *pdev)
                 */
                obj->da_start = 0;
                obj->da_end = 0xfffff000;
+               if (of_find_property(of, "ti,iommu-bus-err-back", NULL))
+                       obj->has_bus_err_back = MMU_GP_REG_BUS_ERR_BACK_EN;
        } else {
                obj->nr_tlb_entries = pdata->nr_tlb_entries;
                obj->name = pdata->name;

diff --git a/drivers/iommu/omap-iommu.h b/drivers/iommu/omap-iommu.h
index 1200842066025dec7c6da98791ce64919b858fdd..ea920c3e94ff3497819fe26062fbca2f2128cbe4 100644 (file)
--- a/drivers/iommu/omap-iommu.h
+++ b/drivers/iommu/omap-iommu.h
@@ -52,6 +52,8 @@ struct omap_iommu {
        void *ctx; /* iommu context: registres saved area */
        u32 da_start;
        u32 da_end;
+
+       int has_bus_err_back;
 };
 
 struct cr_regs {
@@ -130,6 +132,7 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
 #define MMU_READ_CAM           0x68
 #define MMU_READ_RAM           0x6c
 #define MMU_EMU_FAULT_AD       0x70
+#define MMU_GP_REG             0x88
 
 #define MMU_REG_SIZE           256
 
@@ -163,6 +166,8 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
 #define MMU_RAM_MIXED_MASK     (1 << MMU_RAM_MIXED_SHIFT)
 #define MMU_RAM_MIXED          MMU_RAM_MIXED_MASK
 
+#define MMU_GP_REG_BUS_ERR_BACK_EN     0x1
+
 /*
  * utilities for super page(16MB, 1MB, 64KB and 4KB)
  */

diff --git a/drivers/iommu/omap-iommu2.c b/drivers/iommu/omap-iommu2.c
index d745094a69ddf180eeea86b4727a844008383682..5e1ea3b0bf16e0a8b917da634389c9bcb21f981b 100644 (file)
--- a/drivers/iommu/omap-iommu2.c
+++ b/drivers/iommu/omap-iommu2.c
@@ -98,6 +98,9 @@ static int omap2_iommu_enable(struct omap_iommu *obj)
 
        iommu_write_reg(obj, pa, MMU_TTB);
 
+       if (obj->has_bus_err_back)
+               iommu_write_reg(obj, MMU_GP_REG_BUS_ERR_BACK_EN, MMU_GP_REG);
+
        __iommu_set_twl(obj, true);
 
        return 0;