devpriv->clock_source = source;
/* it seems to typically take a few hundred microseconds for PLL to lock */
for (i = 0; i < timeout; ++i) {
- if (ni_readw(dev, NI_M_PLL_STATUS_REG) & MSeries_PLL_Locked_Bit)
+ if (ni_readw(dev, NI_M_PLL_STATUS_REG) & NI_M_PLL_STATUS_LOCKED)
break;
udelay(1);
}
#define NI_M_PLL_MAX_MULTIPLIER 0x100
#define NI_M_PLL_CTRL_MULTIPLIER(x) (((x) & 0xff) << 0)
#define NI_M_PLL_STATUS_REG 0x1c8
+#define NI_M_PLL_STATUS_LOCKED BIT(0)
#define NI_M_PFI_OUT_SEL_REG(x) (0x1d0 + ((x) * 2))
#define NI_M_PFI_DI_REG 0x1dc
#define NI_M_PFI_DO_REG 0x1de
#define NI_M_STATIC_AI_CTRL_REG(x) ((x) ? (0x260 + (x)) : 0x064)
#define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x))
-enum MSeries_PLL_Status {
- MSeries_PLL_Locked_Bit = 0x1
-};
-
enum MSeries_AI_Config_FIFO_Bypass_Bits {
MSeries_AI_Bypass_Channel_Mask = 0x7,
MSeries_AI_Bypass_Bank_Mask = 0x78,