]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
drm/radeon/kms: check modes against max pixel clock
authorAlex Deucher <alexdeucher@gmail.com>
Wed, 8 Jun 2011 17:01:11 +0000 (13:01 -0400)
committerDave Airlie <airlied@redhat.com>
Thu, 9 Jun 2011 04:33:19 +0000 (14:33 +1000)
Filter out modes that are higher than the max pixel
clock.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_atombios.c
drivers/gpu/drm/radeon/radeon_clocks.c
drivers/gpu/drm/radeon/radeon_combios.c
drivers/gpu/drm/radeon/radeon_connectors.c

index ba643b5760542e0e6ad3298464be1e7505995739..27f45579e64ba4d895037db76241814bd24f5d14 100644 (file)
@@ -165,6 +165,7 @@ struct radeon_clock {
        uint32_t default_sclk;
        uint32_t default_dispclk;
        uint32_t dp_extclk;
+       uint32_t max_pixel_clock;
 };
 
 /*
index 90dfb2b8cf0318529b28b84b0bfd831764e5d59e..fa62a503ae70e9daf5b371aa12b2ff1dbdc0a508 100644 (file)
@@ -1246,6 +1246,10 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
                }
                *dcpll = *p1pll;
 
+               rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);
+               if (rdev->clock.max_pixel_clock == 0)
+                       rdev->clock.max_pixel_clock = 40000;
+
                return true;
        }
 
index 5249af8931e60549e01362102f9c8ca941ba0d24..2d48e7a1474b4d915652cc8c6718dc4c8f4a8db4 100644 (file)
@@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
        p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
        if (p1pll->reference_div < 2)
                p1pll->reference_div = 12;
-       p2pll->reference_div = p1pll->reference_div;    
+       p2pll->reference_div = p1pll->reference_div;
 
        /* These aren't in the device-tree */
        if (rdev->family >= CHIP_R420) {
@@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
                p2pll->pll_out_min = 12500;
                p2pll->pll_out_max = 35000;
        }
+       /* not sure what the max should be in all cases */
+       rdev->clock.max_pixel_clock = 35000;
 
        spll->reference_freq = mpll->reference_freq = p1pll->reference_freq;
        spll->reference_div = mpll->reference_div =
@@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
        else
                rdev->clock.default_sclk =
                        radeon_legacy_get_engine_clock(rdev);
-                       
+
        val = of_get_property(dp, "ATY,MCLK", NULL);
        if (val && *val)
                rdev->clock.default_mclk = (*val) / 10;
@@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
                        radeon_legacy_get_memory_clock(rdev);
 
        DRM_INFO("Using device-tree clock info\n");
-       
+
        return true;
 }
 #else
index 5b991f7c6e2add24f1b4290b270cf1d44282915f..d1b95b70af6178990b052029926b6d78ef14956b 100644 (file)
@@ -866,6 +866,11 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
                rdev->clock.default_sclk = sclk;
                rdev->clock.default_mclk = mclk;
 
+               if (RBIOS32(pll_info + 0x16))
+                       rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);
+               else
+                       rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */
+
                return true;
        }
        return false;
index ee1dccb3fec9792e721c17aae9b0eb81d832c396..9c2929c7e79f9cf3390a8171416eab8d312148fa 100644 (file)
@@ -626,8 +626,14 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
 static int radeon_vga_mode_valid(struct drm_connector *connector,
                                  struct drm_display_mode *mode)
 {
+       struct drm_device *dev = connector->dev;
+       struct radeon_device *rdev = dev->dev_private;
+
        /* XXX check mode bandwidth */
-       /* XXX verify against max DAC output frequency */
+
+       if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+               return MODE_CLOCK_HIGH;
+
        return MODE_OK;
 }
 
@@ -1015,6 +1021,11 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
                } else
                        return MODE_CLOCK_HIGH;
        }
+
+       /* check against the max pixel clock */
+       if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+               return MODE_CLOCK_HIGH;
+
        return MODE_OK;
 }