This patch enables the THRI ("transmission holding register empty") bit in the
IIR register to make sure the guest doesn't think we have data waiting for it.
Signed-off-by: Pekka Enberg <penberg@kernel.org>
#define IIR 2
#define UART_IIR_NO_INT 0x01
+#define UART_IIR_THRI 0x02
/* 16550 FIFO Control Register */
#define FCR 2
switch (offset) {
case THR:
- ioport__write8(data, 0x00);
+ /* TODO: input support */
break;
case IER:
ioport__write8(data, device.ier);
break;
case IIR:
- ioport__write8(data, UART_IIR_NO_INT);
+ ioport__write8(data, UART_IIR_NO_INT | UART_IIR_THRI);
break;
case LCR:
ioport__write8(data, device.lcr);