ARM: dt: t30 cardhu: set pinmux and power for wlan

Configure pinmux as required for WiFi.
Enable the SDHCI1 controller for a02 and a04 board, which is connected to the
WiFi module.
For now, always enable the regulator that provides power to the Wifi module.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
index dd4222f00eca9b4dc82637976283235906d1b708..adc88aa50eb634e5c36b002f6a06420aa6917a7c 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
@@ -83,5 +83,11 @@
                        gpio = <&gpio 83 0>; /* GPIO PK3 */
                };
        };
+
+       sdhci@78000400 {
+               status = "okay";
+               power-gpios = <&gpio 28 0>; /* gpio PD4 */
+               bus-width = <4>;
+       };
 };
 

diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index 0828f097ca860490b7edd786b619bf889535014a..08163e145d57d10691f85ae6de770321d5f168f4 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -95,4 +95,10 @@
                        gpio = <&gpio 232 0>; /* GPIO PDD0 */
                };
        };
+
+       sdhci@78000400 {
+               status = "okay";
+               power-gpios = <&gpio 27 0>; /* gpio PD3 */
+               bus-width = <4>;
+       };
 };

diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index d10c9c5a3606df6fe6923a64557cc7e749015d1b..4475750b48e95851856ade91ad954e18204aecc0 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -52,6 +52,22 @@
                                nvidia,pull = <2>;
                                nvidia,tristate = <0>;
                        };
+                       sdmmc3_clk_pa6 {
+                               nvidia,pins = "sdmmc3_clk_pa6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <0>;
+                               nvidia,tristate = <0>;
+                       };
+                       sdmmc3_cmd_pa7 {
+                               nvidia,pins =   "sdmmc3_cmd_pa7",
+                                               "sdmmc3_dat0_pb7",
+                                               "sdmmc3_dat1_pb6",
+                                               "sdmmc3_dat2_pb5",
+                                               "sdmmc3_dat3_pb4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <2>;
+                               nvidia,tristate = <0>;
+                       };
                        sdmmc4_clk_pcc4 {
                                nvidia,pins =   "sdmmc4_clk_pcc4",
                                                "sdmmc4_rst_n_pcc3";
@@ -81,6 +97,15 @@
                                nvidia,pull = <0>;
                                nvidia,tristate = <0>;
                        };
+                       sdio3 {
+                               nvidia,pins = "drive_sdio3";
+                               nvidia,high-speed-mode = <0>;
+                               nvidia,schmitt = <0>;
+                               nvidia,pull-down-strength = <46>;
+                               nvidia,pull-up-strength = <42>;
+                               nvidia,slew-rate-rising = <1>;
+                               nvidia,slew-rate-falling = <1>;
+                       };
                };
        };
 
@@ -409,6 +434,8 @@
                        regulator-name = "vdd_com";
                        regulator-min-microvolt = <3300000>;
                        regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+                       regulator-boot-on;
                        enable-active-high;
                        gpio = <&gpio 24 0>; /* gpio PD0 */
                        vin-supply = <&sys_3v3_reg>;