}
fw = &ha->fw_dump->isp.isp25;
qla2xxx_prep_dump(ha, ha->fw_dump);
+ ha->fw_dump->version = __constant_htonl(2);
fw->host_status = htonl(RD_REG_DWORD(®->host_status));
if (rval != QLA_SUCCESS)
goto qla25xx_fw_dump_failed_0;
+ /* Host/Risc registers. */
+ iter_reg = fw->host_risc_reg;
+ iter_reg = qla24xx_read_window(reg, 0x7000, 16, iter_reg);
+ qla24xx_read_window(reg, 0x7010, 16, iter_reg);
+
+ /* PCIe registers. */
+ WRT_REG_DWORD(®->iobase_addr, 0x7C00);
+ RD_REG_DWORD(®->iobase_addr);
+ WRT_REG_DWORD(®->iobase_window, 0x01);
+ dmp_reg = ®->iobase_c4;
+ fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg++));
+ fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg++));
+ fw->pcie_regs[2] = htonl(RD_REG_DWORD(dmp_reg));
+ fw->pcie_regs[3] = htonl(RD_REG_DWORD(®->iobase_window));
+ WRT_REG_DWORD(®->iobase_window, 0x00);
+ RD_REG_DWORD(®->iobase_window);
+
/* Host interface registers. */
dmp_reg = ®->flash_addr;
for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)