struct TxParam {
volatile short offset;
volatile short length;
- volatile u_char dest[6];
+ volatile u_char dest[6];
volatile unsigned char clear;
volatile unsigned char retries;
volatile unsigned char routing;
unsigned long tx_last_sent;
unsigned long tx_last_cleared;
unsigned long retransmissions;
- unsigned long interrupt_ack_requested;
+ unsigned long interrupt_ack_requested;
spinlock_t lock;
unsigned long waiting_command_mask;
- unsigned long card_polling_interval;
- unsigned long last_command_buff_free_time;
+ unsigned long card_polling_interval;
+ unsigned long last_command_buff_free_time;
- int under_reset;
- int under_config;
- int rx_command_given;
- int tx_command_given;
+ int under_reset;
+ int under_config;
+ int rx_command_given;
+ int tx_command_given;
unsigned long interrupt_processing_active;
unsigned long last_rx_int_ack_time;
unsigned long in_bytes;
- unsigned long out_bytes;
+ unsigned long out_bytes;
unsigned long in_time;
unsigned long out_time;
unsigned long in_time10;
unsigned long out_time10;
unsigned long in_bytes10;
- unsigned long out_bytes10;
+ unsigned long out_bytes10;
int init_etherdev_alloc;
};
#define ARLAN_CLEAR 0x00
-#define ARLAN_RESET 0x01
+#define ARLAN_RESET 0x01
#define ARLAN_CHANNEL_ATTENTION 0x02
-#define ARLAN_INTERRUPT_ENABLE 0x04
-#define ARLAN_CLEAR_INTERRUPT 0x08
-#define ARLAN_POWER 0x40
+#define ARLAN_INTERRUPT_ENABLE 0x04
+#define ARLAN_CLEAR_INTERRUPT 0x08
+#define ARLAN_POWER 0x40
#define ARLAN_ACCESS 0x80
#define ARLAN_COM_CONF 0x01
#define registrationBad(dev)\
- (( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
- ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0))
+ ((READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
+ (READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0))
#define readControlRegister(dev)\
int cr; \
\
cr = readControlRegister(dev);\
- if (cr & ARLAN_CHANNEL_ATTENTION) { \
+ if (cr & ARLAN_CHANNEL_ATTENTION) \
writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
- } else \
+ else \
writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
}
#define ARLAN_COMMAND_RX_ABORT 0x000080
#define ARLAN_COMMAND_POWERDOWN 0x000100
#define ARLAN_COMMAND_POWERUP 0x000200
-#define ARLAN_COMMAND_SLOW_POLL 0x000400
-#define ARLAN_COMMAND_ACTIVATE 0x000800
+#define ARLAN_COMMAND_SLOW_POLL 0x000400
+#define ARLAN_COMMAND_ACTIVATE 0x000800
#define ARLAN_COMMAND_INT_ACK 0x001000
#define ARLAN_COMMAND_INT_ENABLE 0x002000
#define ARLAN_COMMAND_WAIT_NOW 0x004000