select IMX_HAVE_PLATFORM_MXC_PWM
select IMX_HAVE_PLATFORM_LDB
select IMX_HAVE_PLATFORM_IMX_SPDIF
+ select IMX_HAVE_PLATFORM_IMX_VDOA
config FORCE_MAX_ZONEORDER
int "MAX_ORDER"
if (!disable_mipi_dsi)
imx6q_add_mipi_dsi(&mipi_dsi_pdata);
+ imx6q_add_vdoa();
imx6q_add_lcdif(&lcdif_data);
imx6q_add_ldb(&ldb_data);
imx6q_add_v4l2_output(0);
for (i = 0; i < (ARRAY_SIZE(sabr_fb_data) + 1) / 2; i++)
imx6q_add_ipuv3fb(i, &sabr_fb_data[i]);
+ imx6q_add_vdoa();
imx6q_add_mipi_dsi(&mipi_dsi_pdata);
imx6q_add_lcdif(&lcdif_data);
imx6q_add_ldb(&ldb_data);
for (i = 0; i < ARRAY_SIZE(sabrelite_fb_data); i++)
imx6q_add_ipuv3fb(i, &sabrelite_fb_data[i]);
+ imx6q_add_vdoa();
imx6q_add_lcdif(&lcdif_data);
imx6q_add_ldb(&ldb_data);
imx6q_add_v4l2_output(0);
for (i = 0; i < (ARRAY_SIZE(sabresd_fb_data) + 1) / 2; i++)
imx6q_add_ipuv3fb(i, &sabresd_fb_data[i]);
+ imx6q_add_vdoa();
imx6q_add_lcdif(&lcdif_data);
imx6q_add_ldb(&ldb_data);
imx6q_add_v4l2_output(0);
static struct clk vdoa_clk = {
__INIT_CLK_DEBUG(vdoa_clk)
.id = 0,
- .parent = &axi_clk,
- .secondary = &mx6fast1_clk,
+ .parent = &vdo_axi_clk,
+ .secondary = &ipg_clk,
.enable_reg = MXC_CCM_CCGR2,
.enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,
.enable = _clk_enable,
_REGISTER_CLOCK(NULL, "hdmi_isfr_clk", hdmi_clk[0]),
_REGISTER_CLOCK(NULL, "hdmi_iahb_clk", hdmi_clk[1]),
_REGISTER_CLOCK(NULL, "mipi_pllref_clk", mipi_pllref_clk),
- _REGISTER_CLOCK(NULL, NULL, vdoa_clk),
+ _REGISTER_CLOCK(NULL, "vdoa", vdoa_clk),
_REGISTER_CLOCK(NULL, NULL, aips_tz2_clk),
_REGISTER_CLOCK(NULL, NULL, aips_tz1_clk),
_REGISTER_CLOCK(NULL, "clko_clk", clko_clk),
extern const struct imx_epdc_data imx6dl_epdc_data __initconst;
#define imx6dl_add_imx_epdc(pdata) \
imx_add_imx_epdc(&imx6dl_epdc_data, pdata)
+extern const struct imx_vdoa_data imx6q_vdoa_data __initconst;
+#define imx6q_add_vdoa() imx_add_vdoa(&imx6q_vdoa_data)
config IMX_HAVE_PLATFORM_IMX_MIPI_CSI2
bool
+
+config IMX_HAVE_PLATFORM_IMX_VDOA
+ bool
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC) += platform-imx-asrc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_DSI) += platform-imx-mipi_dsi.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2) += platform-imx-mipi_csi2.o
+obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA) += platform-imx-vdoa.o
--- /dev/null
+/*
+ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+
+#define imx_vdoa_data_entry_single(soc, _id, _hwid, size) \
+ { \
+ .id = _id, \
+ .iobase = soc ## _VDOA ## _hwid ## _BASE_ADDR, \
+ .iosize = size, \
+ .irq = soc ## _INT_VDOA ## _hwid, \
+ }
+
+#define imx_vdoa_data_entry(soc, _id, _hwid, _size) \
+ [_id] = imx_vdoa_data_entry_single(soc, _id, _hwid, _size)
+
+#ifdef CONFIG_SOC_IMX6Q
+#define MX6Q_VDOA_BASE_ADDR VDOA_BASE_ADDR
+#define SOC_VDOA_BASE_ADDR MX6Q_VDOA_BASE_ADDR
+#define MX6Q_INT_VDOA MXC_INT_VDOA
+const struct imx_vdoa_data imx6q_vdoa_data __initconst =
+ imx_vdoa_data_entry_single(MX6Q, 0, , SZ_4K);
+#endif
+
+struct platform_device *__init imx_add_vdoa(
+ const struct imx_vdoa_data *data)
+{
+ struct resource res[] = {
+ {
+ .start = data->iobase,
+ .end = data->iobase + data->iosize - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = data->irq,
+ .end = data->irq,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+
+ return imx_add_platform_device("mxc_vdoa", -1,
+ res, ARRAY_SIZE(res), NULL, 0);
+}
struct platform_device *__init imx_add_rngb(
const struct imx_rngb_data *data);
+
+struct imx_vdoa_data {
+ int id;
+ resource_size_t iobase;
+ resource_size_t iosize;
+ resource_size_t irq;
+};
+struct platform_device *__init imx_add_vdoa(
+ const struct imx_vdoa_data *data);
CSI_PRP_ENC_MEM = _MAKE_CHAN(19, NO_DMA, NO_DMA, NO_DMA, 20),
CSI_PRP_VF_MEM = _MAKE_CHAN(20, NO_DMA, NO_DMA, NO_DMA, 21),
+ /* for vdi mem->vdi->ic->mem , add graphics plane and alpha*/
MEM_VDI_PRP_VF_MEM_P = _MAKE_CHAN(21, 8, 14, 17, 21),
MEM_VDI_PRP_VF_MEM = _MAKE_CHAN(22, 9, 14, 17, 21),
MEM_VDI_PRP_VF_MEM_N = _MAKE_CHAN(23, 10, 14, 17, 21),
+ /* for vdi mem->vdi->mem */
+ MEM_VDI_MEM_P = _MAKE_CHAN(24, 8, NO_DMA, NO_DMA, 5),
+ MEM_VDI_MEM = _MAKE_CHAN(25, 9, NO_DMA, NO_DMA, 5),
+ MEM_VDI_MEM_N = _MAKE_CHAN(26, 10, NO_DMA, NO_DMA, 5),
+
+ /* fake channel for vdoa to link with IPU */
+ MEM_VDOA_MEM = _MAKE_CHAN(27, NO_DMA, NO_DMA, NO_DMA, NO_DMA),
+
MEM_PP_ADC = CHAN_NONE,
ADC_SYS2 = CHAN_NONE,
IPU_IRQ_CSI1_OUT_EOF = 1,
IPU_IRQ_CSI2_OUT_EOF = 2,
IPU_IRQ_CSI3_OUT_EOF = 3,
+ IPU_IRQ_VDIC_OUT_EOF = 5,
IPU_IRQ_VDI_P_IN_EOF = 8,
IPU_IRQ_VDI_C_IN_EOF = 9,
IPU_IRQ_VDI_N_IN_EOF = 10,
void ipu_free_irq(struct ipu_soc *ipu, uint32_t irq, void *dev_id);
bool ipu_get_irq_status(struct ipu_soc *ipu, uint32_t irq);
void ipu_set_csc_coefficients(struct ipu_soc *ipu, ipu_channel_t channel, int32_t param[][3]);
+int32_t ipu_set_channel_bandmode(struct ipu_soc *ipu, ipu_channel_t channel,
+ ipu_buffer_t type, uint32_t band_height);
/* two stripe calculations */
struct stripe_param{