]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: dts: omap3: add minimal l4 bus layout with control module support
authorTero Kristo <t-kristo@ti.com>
Tue, 24 Feb 2015 14:22:45 +0000 (16:22 +0200)
committerTero Kristo <t-kristo@ti.com>
Tue, 31 Mar 2015 18:26:56 +0000 (21:26 +0300)
This patch creates an l4_core interconnect for OMAP3, and moves some
of the generic peripherals under it. System control module nodes are
moved under this new interconnect also, and the SCM clock layout
is changed to use the renamed SCM node as the clock provider.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Tony Lindgren <tony@atomide.com>
Documentation/devicetree/bindings/arm/omap/l4.txt
Documentation/devicetree/bindings/arm/omap/prcm.txt
arch/arm/boot/dts/am3517.dtsi
arch/arm/boot/dts/am35xx-clocks.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap3xxx-clocks.dtsi
arch/arm/mach-omap2/control.c

index 57569cc8df169cdd3e87a632808521e435306fb6..64020220024d01defe67ac161a844015983de309 100644 (file)
@@ -5,6 +5,7 @@ These bindings describe the OMAP SoCs L4 interconnect bus.
 Required properties:
 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
               Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
+              Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
 - ranges : contains the IO map range for the bus
 
 Examples:
index cce8365b66e841f162ffa366bd1a94d872b97376..ef5a74be6148661063a6b9f7ff9a2f1a24079ffe 100644 (file)
@@ -17,7 +17,7 @@ Required properties:
                "ti,omap2-scm"
                "ti,omap3-prm"
                "ti,omap3-cm"
-               "ti,omap3-scrm"
+               "ti,omap3-scm"
                "ti,omap4-cm1"
                "ti,omap4-prm"
                "ti,omap4-cm2"
index c90724bded1081b7ea6e22461451e39d48828cec..f164dce08755cc5866b79133050db9f808cafce9 100644 (file)
@@ -31,7 +31,7 @@
                        status = "disabled";
                        reg = <0x5c000000 0x30000>;
                        interrupts = <67 68 69 70>;
-                       syscon = <&omap3_scm_general>;
+                       syscon = <&scm_conf>;
                        ti,davinci-ctrl-reg-offset = <0x10000>;
                        ti,davinci-ctrl-mod-reg-offset = <0>;
                        ti,davinci-ctrl-ram-offset = <0x20000>;
index df489d310b50aa0ad01f7750cb6fb17ea36da540..518b8fde88b0c87005fe68e413cfee769befac07 100644 (file)
@@ -7,7 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-&scrm_clocks {
+&scm_clocks {
        emac_ick: emac_ick {
                #clock-cells = <0>;
                compatible = "ti,am35xx-gate-clock";
index 01b71111bd558738595fde6deaa71b05c4c08e9a..b28791ade27a4130ebd7b0371060f61ef8c1f93d 100644 (file)
                ranges;
                ti,hwmods = "l3_main";
 
+               l4_core: l4@48000000 {
+                       compatible = "ti,omap3-l4-core", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x48000000 0x1000000>;
+
+                       scm: scm@2000 {
+                               compatible = "ti,omap3-scm", "simple-bus";
+                               reg = <0x2000 0x2000>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x2000 0x2000>;
+
+                               omap3_pmx_core: pinmux@30 {
+                                       compatible = "ti,omap3-padconf",
+                                                    "pinctrl-single";
+                                       reg = <0x30 0x238>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       #interrupt-cells = <1>;
+                                       interrupt-controller;
+                                       pinctrl-single,register-width = <16>;
+                                       pinctrl-single,function-mask = <0xff1f>;
+                               };
+
+                               scm_conf: scm_conf@270 {
+                                       compatible = "syscon";
+                                       reg = <0x270 0x330>;
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       scm_clocks: clocks {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
+                                       };
+                               };
+
+                               scm_clockdomains: clockdomains {
+                               };
+
+                               omap3_pmx_wkup: pinmux@a00 {
+                                       compatible = "ti,omap3-padconf",
+                                                    "pinctrl-single";
+                                       reg = <0xa00 0x5c>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       #interrupt-cells = <1>;
+                                       interrupt-controller;
+                                       pinctrl-single,register-width = <16>;
+                                       pinctrl-single,function-mask = <0xff1f>;
+                               };
+                       };
+               };
+
                aes: aes@480c5000 {
                        compatible = "ti,omap3-aes";
                        ti,hwmods = "aes";
                        };
                };
 
-               scrm: scrm@48002000 {
-                       compatible = "ti,omap3-scrm";
-                       reg = <0x48002000 0x2000>;
-
-                       scrm_clocks: clocks {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                       };
-
-                       scrm_clockdomains: clockdomains {
-                       };
-               };
-
                counter32k: counter@48320000 {
                        compatible = "ti,omap-counter32k";
                        reg = <0x48320000 0x20>;
                        #dma-requests = <96>;
                };
 
-               omap3_pmx_core: pinmux@48002030 {
-                       compatible = "ti,omap3-padconf", "pinctrl-single";
-                       reg = <0x48002030 0x0238>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       #interrupt-cells = <1>;
-                       interrupt-controller;
-                       pinctrl-single,register-width = <16>;
-                       pinctrl-single,function-mask = <0xff1f>;
-               };
-
-               omap3_pmx_wkup: pinmux@48002a00 {
-                       compatible = "ti,omap3-padconf", "pinctrl-single";
-                       reg = <0x48002a00 0x5c>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       #interrupt-cells = <1>;
-                       interrupt-controller;
-                       pinctrl-single,register-width = <16>;
-                       pinctrl-single,function-mask = <0xff1f>;
-               };
-
-               omap3_scm_general: tisyscon@48002270 {
-                       compatible = "syscon";
-                       reg = <0x48002270 0x2f0>;
-               };
-
                pbias_regulator: pbias_regulator {
                        compatible = "ti,pbias-omap";
                        reg = <0x2b0 0x4>;
-                       syscon = <&omap3_scm_general>;
+                       syscon = <&scm_conf>;
                        pbias_mmc_reg: pbias_mmc_omap2430 {
                                regulator-name = "pbias_mmc_omap2430";
                                regulator-min-microvolt = <1800000>;
index 5c375003bad106216109b5626264300433dabd1d..bbba5bdc4bc946d5cb9b179283c65f27ecdef1d9 100644 (file)
                clock-div = <1>;
        };
 };
-&scrm_clocks {
+
+&scm_clocks {
        mcbsp5_mux_fck: mcbsp5_mux_fck {
                #clock-cells = <0>;
                compatible = "ti,composite-mux-clock";
                clocks = <&core_96m_fck>, <&mcbsp_clks>;
                ti,bit-shift = <4>;
-               reg = <0x02d8>;
+               reg = <0x68>;
        };
 
        mcbsp5_fck: mcbsp5_fck {
                compatible = "ti,composite-mux-clock";
                clocks = <&core_96m_fck>, <&mcbsp_clks>;
                ti,bit-shift = <2>;
-               reg = <0x0274>;
+               reg = <0x04>;
        };
 
        mcbsp1_fck: mcbsp1_fck {
                compatible = "ti,composite-mux-clock";
                clocks = <&per_96m_fck>, <&mcbsp_clks>;
                ti,bit-shift = <6>;
-               reg = <0x0274>;
+               reg = <0x04>;
        };
 
        mcbsp2_fck: mcbsp2_fck {
                #clock-cells = <0>;
                compatible = "ti,composite-mux-clock";
                clocks = <&per_96m_fck>, <&mcbsp_clks>;
-               reg = <0x02d8>;
+               reg = <0x68>;
        };
 
        mcbsp3_fck: mcbsp3_fck {
                compatible = "ti,composite-mux-clock";
                clocks = <&per_96m_fck>, <&mcbsp_clks>;
                ti,bit-shift = <2>;
-               reg = <0x02d8>;
+               reg = <0x68>;
        };
 
        mcbsp4_fck: mcbsp4_fck {
index eb592ea51b78dc3823485f93d4a0b15d5f43eacc..30f5aff7645fc5b32090042c7c4f5f1a8401cdfc 100644 (file)
@@ -670,7 +670,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = {
        { .compatible = "ti,am3-scrm", .data = &ctrl_data },
        { .compatible = "ti,am4-scrm", .data = &ctrl_data },
        { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data },
-       { .compatible = "ti,omap3-scrm", .data = &ctrl_data },
+       { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data },
        { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
        { }
 };