drm/nv50/disp: synchronise display right after init

This has the effect of ensuring the encoders which were active before we
loaded get disconnected properly before we start reprogramming them.

Also removing a bit of cargo-cult from the initial evo pushbuf.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index f794b4e08f5f2ff9288e52a712fff4e62c840c4b..c1c57cb3720854bc95cac5e30871ba20d3febf85 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -627,7 +627,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
                }
        }
 
-       ret = RING_SPACE(evo, 17);
+       ret = RING_SPACE(evo, 19);
        if (ret)
                return ret;
 
@@ -652,7 +652,10 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
        }
 
        BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, UNK082C), 1);
-       OUT_RING(evo, 0);
+       OUT_RING  (evo, 0);
+       /* required to make display sync channel not hate life */
+       BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, UNK900), 1);
+       OUT_RING  (evo, 0x00000311);
 
        /* This is the actual resolution of the mode. */
        BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, REAL_RES), 1);

diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 80b220f4b12587b3d2c114aa4e7fb31adaa77ac7..a37e32e00ec832549ff8f82ced04c3d14b13bda7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -210,31 +210,14 @@ nv50_display_init(struct drm_device *dev)
 
        nv_wr32(dev, NV50_PDISPLAY_OBJECTS, (evo->ramin->vinst >> 8) | 9);
 
-       ret = RING_SPACE(evo, 15);
+       ret = RING_SPACE(evo, 3);
        if (ret)
                return ret;
        BEGIN_RING(evo, 0, NV50_EVO_UNK84, 2);
-       OUT_RING(evo, NV50_EVO_UNK84_NOTIFY_DISABLED);
-       OUT_RING(evo, NvEvoSync);
-       BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, FB_DMA), 1);
-       OUT_RING(evo, NV50_EVO_CRTC_FB_DMA_HANDLE_NONE);
-       BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, UNK0800), 1);
-       OUT_RING(evo, 0);
-       BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, DISPLAY_START), 1);
-       OUT_RING(evo, 0);
-       BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, UNK082C), 1);
-       OUT_RING(evo, 0);
-       /* required to make display sync channels not hate life */
-       BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, UNK900), 1);
-       OUT_RING  (evo, 0x00000311);
-       BEGIN_RING(evo, 0, NV50_EVO_CRTC(1, UNK900), 1);
-       OUT_RING  (evo, 0x00000311);
-       FIRE_RING(evo);
-       if (!nv_wait(dev, 0x640004, 0xffffffff, evo->dma.put << 2))
-               NV_ERROR(dev, "evo pushbuf stalled\n");
-
+       OUT_RING  (evo, NV50_EVO_UNK84_NOTIFY_DISABLED);
+       OUT_RING  (evo, NvEvoSync);
 
-       return 0;
+       return nv50_display_sync(dev);
 }
 
 static int nv50_display_disable(struct drm_device *dev)
@@ -754,8 +737,8 @@ nv50_display_unk20_handler(struct drm_device *dev)
        if (crtc >= 0) {
                pclk  = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(crtc, CLOCK));
                pclk &= 0x003fffff;
-
-               nv50_crtc_set_clock(dev, crtc, pclk);
+               if (pclk)
+                       nv50_crtc_set_clock(dev, crtc, pclk);
 
                tmp = nv_rd32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(crtc));
                tmp &= ~0x000000f;