arm64: renesas: r8a7795: Sound DVC support

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c3b2089de53138abfb9bf300d5bf6ab79b16de84..b1902ea1dae4cd23eebb94515f8bc86edfe4a667 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -590,6 +590,7 @@
                                 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
                                 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
                                 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+                                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
                                 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
@@ -600,10 +601,22 @@
                                      "src.9", "src.8", "src.7", "src.6",
                                      "src.5", "src.4", "src.3", "src.2",
                                      "src.1", "src.0",
+                                     "dvc.0", "dvc.1",
                                      "clk_a", "clk_b", "clk_c", "clk_i";
                        power-domains = <&cpg>;
                        status = "disabled";
 
+                       rcar_sound,dvc {
+                               dvc0: dvc@0 {
+                                       dmas = <&audma0 0xbc>;
+                                       dma-names = "tx";
+                               };
+                               dvc1: dvc@1 {
+                                       dmas = <&audma0 0xbe>;
+                                       dma-names = "tx";
+                               };
+                       };
+
                        rcar_sound,src {
                                src0: src@0 {
                                        interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;