MIPS: Lantiq: Fix pull gpio up resistors usage

The register that enables a gpios internal pullups was not used.  Make
sure the pullups are activated correctly.

Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3260/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
index f204f6cdbd6a620f13ce4b56f0f8ca81d4d7b1e9..14ff7c7b708a53ef9f99877226fb51fdb3580035 100644 (file)
--- a/arch/mips/lantiq/xway/gpio.c
+++ b/arch/mips/lantiq/xway/gpio.c
@@ -21,6 +21,8 @@
 #define LTQ_GPIO_ALTSEL0       0x0C
 #define LTQ_GPIO_ALTSEL1       0x10
 #define LTQ_GPIO_OD            0x14
+#define LTQ_GPIO_PUDSEL                0x1C
+#define LTQ_GPIO_PUDEN         0x20
 
 #define PINS_PER_PORT          16
 #define MAX_PORTS              3
@@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
 
        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
+       ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
+       ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
 
        return 0;
 }
@@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(struct gpio_chip *chip,
 
        ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
        ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
+       ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
+       ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
        ltq_gpio_set(chip, offset, value);
 
        return 0;