ARM: mx3: Setup AIPS registers

It was observed on a mx31pdk board that audio playback only worked when the bootloader was Redboot, and
did not work when U-boot was used.

Comparing the sources of these bootloaders showed that the AIPS registers were not setup in U-boot.

Instead of relying on the bootloader to setup the AIPS registers, do it in the kernel so that audio
playback can work independantly of the bootloader being used.

Copied the AIPS settings from Redboot to the kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 905aafc1352c4692805c123cdf3e50d9b4dd11fd..35ce8b5fe75da120bb54a7bbc185b76ede2cb1f8 100644 (file)
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -177,6 +177,9 @@ void __init imx31_soc_init(void)
        }
 
        imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
+
+       imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS1_BASE_ADDR));
+       imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR));
 }
 #endif /* ifdef CONFIG_SOC_IMX31 */
 

diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c
index f5b7e0fa237fba3686afb83b90aa4ff3eb18585c..220dd6f93126367efdbce0b1b7630fab4cec25d1 100644 (file)
--- a/arch/arm/plat-mxc/cpu.c
+++ b/arch/arm/plat-mxc/cpu.c
@@ -1,5 +1,6 @@
 
 #include <linux/module.h>
+#include <linux/io.h>
 #include <mach/hardware.h>
 
 unsigned int __mxc_cpu_type;
@@ -18,3 +19,26 @@ void imx_print_silicon_rev(const char *cpu, int srev)
                pr_info("CPU identified as %s, silicon rev %d.%d\n",
                                cpu, (srev >> 4) & 0xf, srev & 0xf);
 }
+
+void __init imx_set_aips(void __iomem *base)
+{
+       unsigned int reg;
+/*
+ * Set all MPROTx to be non-bufferable, trusted for R/W,
+ * not forced to user-mode.
+ */
+       __raw_writel(0x77777777, base + 0x0);
+       __raw_writel(0x77777777, base + 0x4);
+
+/*
+ * Set all OPACRx to be non-bufferable, to not require
+ * supervisor privilege level for access, allow for
+ * write access and untrusted master access.
+ */
+       __raw_writel(0x0, base + 0x40);
+       __raw_writel(0x0, base + 0x44);
+       __raw_writel(0x0, base + 0x48);
+       __raw_writel(0x0, base + 0x4C);
+       reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+       __raw_writel(reg, base + 0x50);
+}

diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 06595a3d7ea352d8e50f72462be6279f676577b1..7c24e5ab7d506d80a630490eb114cc9a47f85c8f 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -75,6 +75,7 @@ extern void mxc_restart(char, const char *);
 extern void mxc_arch_reset_init(void __iomem *);
 extern int mx53_revision(void);
 extern int mx53_display_revision(void);
+extern void imx_set_aips(void __iomem *);
 
 enum mxc_cpu_pwr_mode {
        WAIT_CLOCKED,           /* wfi only */