dmaengine: dw: set src and dst master select according to xfer direction

On some architectures the DMA controller can have two masters connected to
different buses and thus access to memory is possible only through one and
to peripheral through the other.

This patch changes the src and dst master setting to match the direction
of the transfer.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 5bd7873a02c67ab10b7dbd4849f85f26f4e70629..d810980e652d55448a820fff95f62dfd80819fa2 100644 (file)
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -45,13 +45,17 @@
                        DW_DMA_MSIZE_16;                        \
                u8 _dmsize = _is_slave ? _sconfig->dst_maxburst :       \
                        DW_DMA_MSIZE_16;                        \
+               u8 _dms = (_dwc->direction == DMA_MEM_TO_DEV) ?         \
+                       _dwc->p_master : _dwc->m_master;                \
+               u8 _sms = (_dwc->direction == DMA_DEV_TO_MEM) ?         \
+                       _dwc->p_master : _dwc->m_master;                \
                                                                \
                (DWC_CTLL_DST_MSIZE(_dmsize)                    \
                 | DWC_CTLL_SRC_MSIZE(_smsize)                  \
                 | DWC_CTLL_LLP_D_EN                            \
                 | DWC_CTLL_LLP_S_EN                            \
-                | DWC_CTLL_DMS(_dwc->p_master)                 \
-                | DWC_CTLL_SMS(_dwc->m_master));               \
+                | DWC_CTLL_DMS(_dms)                           \
+                | DWC_CTLL_SMS(_sms));                         \
        })
 
 /*