]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
USB: EHCI: ASPM quirk of ISOC on AMD SB800
authorAlex He <alex.he@amd.com>
Tue, 7 Dec 2010 02:10:08 +0000 (10:10 +0800)
committerGreg Kroah-Hartman <gregkh@suse.de>
Thu, 17 Feb 2011 23:36:42 +0000 (15:36 -0800)
commit 05570297ecbe834b1756b522412b68eaffb9ab11 upstream.

When ASPM PM Feature is enabled on UMI link, devices that use ISOC stream of
data transfer may be exposed to longer latency causing less than optimal per-
formance of the device. The longer latencies are normal and are due to link
wake time coming out of low power state which happens frequently to save
power when the link is not active.
The following code will make exception for certain features of ASPM to be by
passed and keep the logic normal state only when the ISOC device is connected
and active. This change will allow the device to run at optimal performance
yet minimize the impact on overall power savings.

Signed-off-by: Alex He <alex.he@amd.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-pci.c
drivers/usb/host/ehci-sched.c
drivers/usb/host/ehci.h

index 8198fc0e4ac6b6592585bb17addd2698900d1535..2151c251f83e4459bf5b77608f4f1b7b9c421966 100644 (file)
@@ -103,6 +103,9 @@ MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 
 #define        INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 
+/* for ASPM quirk of ISOC on AMD SB800 */
+static struct pci_dev *amd_nb_dev;
+
 /*-------------------------------------------------------------------------*/
 
 #include "ehci.h"
@@ -502,6 +505,11 @@ static void ehci_stop (struct usb_hcd *hcd)
        spin_unlock_irq (&ehci->lock);
        ehci_mem_cleanup (ehci);
 
+       if (amd_nb_dev) {
+               pci_dev_put(amd_nb_dev);
+               amd_nb_dev = NULL;
+       }
+
 #ifdef EHCI_STATS
        ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
                ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
index ead5f4f2aa5a43ecf189000e9b0322888675d1a0..b2da9a20cc6ced0c6de7a87865c1c615f5e4855a 100644 (file)
@@ -41,6 +41,35 @@ static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev)
        return 0;
 }
 
+static int ehci_quirk_amd_SB800(struct ehci_hcd *ehci)
+{
+       struct pci_dev *amd_smbus_dev;
+       u8 rev = 0;
+
+       amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, 0x4385, NULL);
+       if (!amd_smbus_dev)
+               return 0;
+
+       pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
+       if (rev < 0x40) {
+               pci_dev_put(amd_smbus_dev);
+               amd_smbus_dev = NULL;
+               return 0;
+       }
+
+       if (!amd_nb_dev)
+               amd_nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1510, NULL);
+       if (!amd_nb_dev)
+               ehci_err(ehci, "QUIRK: unable to get AMD NB device\n");
+
+       ehci_info(ehci, "QUIRK: Enable AMD SB800 L1 fix\n");
+
+       pci_dev_put(amd_smbus_dev);
+       amd_smbus_dev = NULL;
+
+       return 1;
+}
+
 /* called during probe() after chip reset completes */
 static int ehci_pci_setup(struct usb_hcd *hcd)
 {
@@ -99,6 +128,9 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
        /* cache this readonly data; minimize chip reads */
        ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 
+       if (ehci_quirk_amd_SB800(ehci))
+               ehci->amd_l1_fix = 1;
+
        retval = ehci_halt(ehci);
        if (retval)
                return retval;
index 6746a8a794d40a2d3030ecd3469a9081ad586e18..072f368f7bbe62099a597e09494a4cd329d78efa 100644 (file)
@@ -1576,6 +1576,63 @@ itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
        *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
 }
 
+#define AB_REG_BAR_LOW 0xe0
+#define AB_REG_BAR_HIGH 0xe1
+#define AB_INDX(addr) ((addr) + 0x00)
+#define AB_DATA(addr) ((addr) + 0x04)
+#define NB_PCIE_INDX_ADDR 0xe0
+#define NB_PCIE_INDX_DATA 0xe4
+#define NB_PIF0_PWRDOWN_0 0x01100012
+#define NB_PIF0_PWRDOWN_1 0x01100013
+
+static void ehci_quirk_amd_L1(struct ehci_hcd *ehci, int disable)
+{
+       u32 addr, addr_low, addr_high, val;
+
+       outb_p(AB_REG_BAR_LOW, 0xcd6);
+       addr_low = inb_p(0xcd7);
+       outb_p(AB_REG_BAR_HIGH, 0xcd6);
+       addr_high = inb_p(0xcd7);
+       addr = addr_high << 8 | addr_low;
+       outl_p(0x30, AB_INDX(addr));
+       outl_p(0x40, AB_DATA(addr));
+       outl_p(0x34, AB_INDX(addr));
+       val = inl_p(AB_DATA(addr));
+
+       if (disable) {
+               val &= ~0x8;
+               val |= (1 << 4) | (1 << 9);
+       } else {
+               val |= 0x8;
+               val &= ~((1 << 4) | (1 << 9));
+       }
+       outl_p(val, AB_DATA(addr));
+
+       if (amd_nb_dev) {
+               addr = NB_PIF0_PWRDOWN_0;
+               pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_ADDR, addr);
+               pci_read_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, &val);
+               if (disable)
+                       val &= ~(0x3f << 7);
+               else
+                       val |= 0x3f << 7;
+
+               pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, val);
+
+               addr = NB_PIF0_PWRDOWN_1;
+               pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_ADDR, addr);
+               pci_read_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, &val);
+               if (disable)
+                       val &= ~(0x3f << 7);
+               else
+                       val |= 0x3f << 7;
+
+               pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, val);
+       }
+
+       return;
+}
+
 /* fit urb's itds into the selected schedule slot; activate as needed */
 static int
 itd_link_urb (
@@ -1603,6 +1660,12 @@ itd_link_urb (
                        next_uframe >> 3, next_uframe & 0x7);
                stream->start = jiffies;
        }
+
+       if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+               if (ehci->amd_l1_fix == 1)
+                       ehci_quirk_amd_L1(ehci, 1);
+       }
+
        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
 
        /* fill iTDs uframe by uframe */
@@ -1729,6 +1792,11 @@ itd_complete (
        (void) disable_periodic(ehci);
        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
 
+       if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+               if (ehci->amd_l1_fix == 1)
+                       ehci_quirk_amd_L1(ehci, 0);
+       }
+
        if (unlikely(list_is_singular(&stream->td_list))) {
                ehci_to_hcd(ehci)->self.bandwidth_allocated
                                -= stream->bandwidth;
@@ -2016,6 +2084,12 @@ sitd_link_urb (
                        stream->interval, hc32_to_cpu(ehci, stream->splits));
                stream->start = jiffies;
        }
+
+       if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+               if (ehci->amd_l1_fix == 1)
+                       ehci_quirk_amd_L1(ehci, 1);
+       }
+
        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
 
        /* fill sITDs frame by frame */
@@ -2118,6 +2192,11 @@ sitd_complete (
        (void) disable_periodic(ehci);
        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
 
+       if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+               if (ehci->amd_l1_fix == 1)
+                       ehci_quirk_amd_L1(ehci, 0);
+       }
+
        if (list_is_singular(&stream->td_list)) {
                ehci_to_hcd(ehci)->self.bandwidth_allocated
                                -= stream->bandwidth;
index 556c0b48f3abd73278206e5c1581eb3d32b73850..ac321ef589f62cb7d6f1750e699a92d57fb8eeb6 100644 (file)
@@ -130,6 +130,7 @@ struct ehci_hcd {                   /* one per controller */
        unsigned                has_amcc_usb23:1;
        unsigned                need_io_watchdog:1;
        unsigned                broken_periodic:1;
+       unsigned                amd_l1_fix:1;
 
        /* required for usb32 quirk */
        #define OHCI_CTRL_HCFS          (3 << 6)