]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ARM64: dts: meson: meson-gx: add the SAR ADC
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 22 Jan 2017 18:17:14 +0000 (19:17 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 30 Jan 2017 18:44:04 +0000 (10:44 -0800)
Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a
10-bit ADC while GXL and GXM provide a 12-bit ADC.
Some boards use resistor ladder buttons connected through one of the ADC
channels. On newer devices (GXL and GXM) some boards use pull-ups/downs
to change the resistance (and thus the ADC value) on one of the ADC
channels to indicate the board revision.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi

index 9110dc1a248104af1e0009e5dc3aa1d945365d97..f100d0b013b417cf356e4e227a4b5b3defd669a8 100644 (file)
                                status = "disabled";
                        };
 
+                       saradc: adc@8680 {
+                               compatible = "amlogic,meson-saradc";
+                               reg = <0x0 0x8680 0x0 0x34>;
+                               #io-channel-cells = <1>;
+                               interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+                               status = "disabled";
+                       };
+
                        pwm_ef: pwm@86c0 {
                                compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
                                reg = <0x0 0x086c0 0x0 0x10>;
index 39a774ad83ce13c246bbf8ea417e8c904fd10bdb..04b3324bc1329d9e2107cc86f15f6d6aef834497 100644 (file)
        clocks = <&clkc CLKID_I2C>;
 };
 
+&saradc {
+       compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
+       clocks = <&xtal>,
+                <&clkc CLKID_SAR_ADC>,
+                <&clkc CLKID_SANA>,
+                <&clkc CLKID_SAR_ADC_CLK>,
+                <&clkc CLKID_SAR_ADC_SEL>;
+       clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
+};
+
 &sd_emmc_a {
        clocks = <&clkc CLKID_SD_EMMC_A>,
                 <&xtal>,
index 5f1100af72b15f61a3b904a36a81423e1923b76e..fe11b5fc61f78e02ae8972bed013969de854e840 100644 (file)
        clocks = <&clkc CLKID_I2C>;
 };
 
+&saradc {
+       compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
+       clocks = <&xtal>,
+                <&clkc CLKID_SAR_ADC>,
+                <&clkc CLKID_SANA>,
+                <&clkc CLKID_SAR_ADC_CLK>,
+                <&clkc CLKID_SAR_ADC_SEL>;
+       clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
+};
+
 &sd_emmc_a {
        clocks = <&clkc CLKID_SD_EMMC_A>,
                 <&xtal>,
index 4c55665a253f40a0cce28a1103defa176f097da0..ddea7305c644afdb7d1358395ea8f58ab7e26321 100644 (file)
        };
 };
 
+&saradc {
+       compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
+};
+
 &scpi_dvfs {
        clock-indices = <0 1>;
        clock-output-names = "vbig", "vlittle";