]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
radeon: moved HDMI color depth programming to a separate function
authorSlava Grigorev <slava.grigorev@amd.com>
Mon, 8 Dec 2014 21:25:37 +0000 (16:25 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 22 Jan 2015 15:42:12 +0000 (10:42 -0500)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/dce3_1_afmt.c
drivers/gpu/drm/radeon/evergreen_hdmi.c
drivers/gpu/drm/radeon/r600_hdmi.c
drivers/gpu/drm/radeon/radeon_audio.c
drivers/gpu/drm/radeon/radeon_audio.h

index f07d7b689e497d77cf93c3ecb31a5821397c2f9e..c5f8d5d449e8ef344fd081ea0bcd5bfd8756eecd 100644 (file)
@@ -230,6 +230,8 @@ void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *m
 
        WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000);
 
+       radeon_hdmi_set_color_depth(encoder);
+
        if (ASIC_IS_DCE32(rdev)) {
                WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,
                       HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */
index 3c4b33f094b9101e0914a545bb7b5f070e60b112..44ae355f566902c47951f0d5ff40aef6d2302f9f 100644 (file)
@@ -300,45 +300,12 @@ void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset)
                HDMI_GC_CONT);          /* send general control packets every frame */
 }
 
-/*
- * update the info frames with the data from the current display mode
- */
-void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
+void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc)
 {
        struct drm_device *dev = encoder->dev;
        struct radeon_device *rdev = dev->dev_private;
-       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
        struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
-       u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
-       struct hdmi_avi_infoframe frame;
-       uint32_t offset;
-       ssize_t err;
        uint32_t val;
-       int bpc = 8;
-
-       if (!dig || !dig->afmt)
-               return;
-
-       /* Silent, r600_hdmi_enable will raise WARN for us */
-       if (!dig->afmt->enabled)
-               return;
-       offset = dig->afmt->offset;
-
-       /* hdmi deep color mode general control packets setup, if bpc > 8 */
-       if (encoder->crtc) {
-               struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
-               bpc = radeon_crtc->bpc;
-       }
-
-       /* disable audio prior to setting up hw */
-       dig->afmt->pin = radeon_audio_get_pin(encoder);
-       radeon_audio_enable(rdev, dig->afmt->pin, 0);
-
-       radeon_audio_set_dto(encoder, mode->clock);
-       radeon_audio_set_vbi_packet(encoder);
-
-       WREG32(AFMT_AUDIO_CRC_CONTROL + offset, 0x1000);
 
        val = RREG32(HDMI_CONTROL + offset);
        val &= ~HDMI_DEEP_COLOR_ENABLE;
@@ -368,6 +335,40 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
        }
 
        WREG32(HDMI_CONTROL + offset, val);
+}
+
+/*
+ * update the info frames with the data from the current display mode
+ */
+void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
+{
+       struct drm_device *dev = encoder->dev;
+       struct radeon_device *rdev = dev->dev_private;
+       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+       u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
+       struct hdmi_avi_infoframe frame;
+       uint32_t offset;
+       ssize_t err;
+
+       if (!dig || !dig->afmt)
+               return;
+
+       /* Silent, r600_hdmi_enable will raise WARN for us */
+       if (!dig->afmt->enabled)
+               return;
+       offset = dig->afmt->offset;
+
+       /* disable audio prior to setting up hw */
+       dig->afmt->pin = radeon_audio_get_pin(encoder);
+       radeon_audio_enable(rdev, dig->afmt->pin, 0);
+
+       radeon_audio_set_dto(encoder, mode->clock);
+       radeon_audio_set_vbi_packet(encoder);
+
+       WREG32(AFMT_AUDIO_CRC_CONTROL + offset, 0x1000);
+
+       radeon_hdmi_set_color_depth(encoder);
 
        WREG32(HDMI_INFOFRAME_CONTROL0 + offset,
               HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
index 533fce0ef533e6d02036ed10d570a023d6016c9f..5c5e723787abf2b181849661a663283f7bbec0b6 100644 (file)
@@ -368,6 +368,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
 
        radeon_audio_set_dto(encoder, mode->clock);
        radeon_audio_set_vbi_packet(encoder);
+       radeon_hdmi_set_color_depth(encoder);
 
        WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,
                 HDMI0_AUDIO_SAMPLE_SEND | /* send audio packets */
index 8fad9af92ec8df4c1dec9da17edbce87c032fc3e..ac9ebbfc48af44de4709e392afb5913a4803dd8f 100644 (file)
@@ -87,6 +87,8 @@ void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
        const struct radeon_hdmi_acr *acr);
 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
+void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
+       u32 offset, int bpc);
 
 static const u32 pin_offsets[7] =
 {
@@ -169,6 +171,7 @@ static struct radeon_audio_funcs dce4_hdmi_funcs = {
        .set_dto = dce4_hdmi_audio_set_dto,
        .update_acr = evergreen_hdmi_update_acr,
        .set_vbi_packet = dce4_set_vbi_packet,
+       .set_color_depth = dce4_hdmi_set_color_depth,
 };
 
 static struct radeon_audio_funcs dce4_dp_funcs = {
@@ -188,6 +191,7 @@ static struct radeon_audio_funcs dce6_hdmi_funcs = {
        .set_dto = dce6_hdmi_audio_set_dto,
        .update_acr = evergreen_hdmi_update_acr,
        .set_vbi_packet = dce4_set_vbi_packet,
+       .set_color_depth = dce4_hdmi_set_color_depth,
 };
 
 static struct radeon_audio_funcs dce6_dp_funcs = {
@@ -574,3 +578,21 @@ void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
        if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
                radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
 }
+
+void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
+{
+       int bpc = 8;
+       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+
+       if (!dig || !dig->afmt)
+               return;
+
+       if (encoder->crtc) {
+               struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
+               bpc = radeon_crtc->bpc;
+       }
+
+       if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
+               radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
+}
index 7cdbd7f7faa4cbbe4136cbf7167ab6261b7f376f..f179e5646e42a1898d0671c041c4ad0dd5308fae 100644 (file)
@@ -58,6 +58,7 @@ struct radeon_audio_funcs
        void (*update_acr)(struct drm_encoder *encoder, long offset,
                const struct radeon_hdmi_acr *acr);
        void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset);
+       void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc);
 };
 
 int radeon_audio_init(struct radeon_device *rdev);
@@ -81,5 +82,6 @@ void radeon_update_avi_infoframe(struct drm_encoder *encoder, void *buffer,
        size_t size);
 void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock);
 void radeon_audio_set_vbi_packet(struct drm_encoder *encoder);
+void radeon_hdmi_set_color_depth(struct drm_encoder *encoder);
 
 #endif