drm/nouveau/mc/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
index 81435d5a4adf8a3ab89cd09877bfc61ffc8555ba..27d25b18d85c0d1da40adb950ac9f55826953f5f 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
@@ -27,4 +27,5 @@ int gt215_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gk104_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gk20a_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
+int gp100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index f4fed7e50e170f80754baf3694f7aac2bc7f7553..cfb98466eb78ab11b2091a7381f0d1807cf097c8 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -2151,6 +2151,7 @@ nv12b_chipset = {
 static const struct nvkm_device_chip
 nv130_chipset = {
        .name = "GP100",
+       .mc = gp100_mc_new,
        .top = gk104_top_new,
 };
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
index 49695ac7be2e66331a8b96fae726fff2e17c613f..12943f92c20608e64f8f4b5a90921c35506bcce2 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
@@ -10,3 +10,4 @@ nvkm-y += nvkm/subdev/mc/gt215.o
 nvkm-y += nvkm/subdev/mc/gf100.o
 nvkm-y += nvkm/subdev/mc/gk104.o
 nvkm-y += nvkm/subdev/mc/gk20a.o
+nvkm-y += nvkm/subdev/mc/gp100.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c
new file mode 100644 (file)
index 0000000..4d22f4a
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#define gp100_mc(p) container_of((p), struct gp100_mc, base)
+#include "priv.h"
+
+struct gp100_mc {
+       struct nvkm_mc base;
+       spinlock_t lock;
+       bool intr;
+       u32 mask;
+};
+
+static void
+gp100_mc_intr_update(struct gp100_mc *mc)
+{
+       struct nvkm_device *device = mc->base.subdev.device;
+       u32 mask = mc->intr ? mc->mask : 0, i;
+       for (i = 0; i < 2; i++) {
+               nvkm_wr32(device, 0x000180 + (i * 0x04), ~mask);
+               nvkm_wr32(device, 0x000160 + (i * 0x04),  mask);
+       }
+}
+
+static void
+gp100_mc_intr_unarm(struct nvkm_mc *base)
+{
+       struct gp100_mc *mc = gp100_mc(base);
+       unsigned long flags;
+       spin_lock_irqsave(&mc->lock, flags);
+       mc->intr = false;
+       gp100_mc_intr_update(mc);
+       spin_unlock_irqrestore(&mc->lock, flags);
+}
+
+static void
+gp100_mc_intr_rearm(struct nvkm_mc *base)
+{
+       struct gp100_mc *mc = gp100_mc(base);
+       unsigned long flags;
+       spin_lock_irqsave(&mc->lock, flags);
+       mc->intr = true;
+       gp100_mc_intr_update(mc);
+       spin_unlock_irqrestore(&mc->lock, flags);
+}
+
+static void
+gp100_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr)
+{
+       struct gp100_mc *mc = gp100_mc(base);
+       unsigned long flags;
+       spin_lock_irqsave(&mc->lock, flags);
+       mc->mask = (mc->mask & ~mask) | intr;
+       gp100_mc_intr_update(mc);
+       spin_unlock_irqrestore(&mc->lock, flags);
+}
+
+static const struct nvkm_mc_func
+gp100_mc = {
+       .init = nv50_mc_init,
+       .intr = gk104_mc_intr,
+       .intr_unarm = gp100_mc_intr_unarm,
+       .intr_rearm = gp100_mc_intr_rearm,
+       .intr_mask = gp100_mc_intr_mask,
+       .intr_stat = gf100_mc_intr_stat,
+       .reset = gk104_mc_reset,
+};
+
+int
+gp100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       struct gp100_mc *mc;
+
+       if (!(mc = kzalloc(sizeof(*mc), GFP_KERNEL)))
+               return -ENOMEM;
+       nvkm_mc_ctor(&gp100_mc, device, index, &mc->base);
+       *pmc = &mc->base;
+
+       spin_lock_init(&mc->lock);
+       mc->intr = false;
+       mc->mask = 0x7fffffff;
+       return 0;
+}