]> git.karo-electronics.de Git - mv-sheeva.git/commitdiff
intel-iommu: Only avoid flushing device IOTLB for domain ID 0 in caching mode
authorYu Zhao <yu.zhao@intel.com>
Mon, 29 Jun 2009 03:31:45 +0000 (11:31 +0800)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Mon, 29 Jun 2009 11:34:11 +0000 (12:34 +0100)
In caching mode, domain ID 0 is reserved for non-present to present
mapping flush. Device IOTLB doesn't need to be flushed in this case.

Previously we were avoiding the flush for domain zero, even if the IOMMU
wasn't in caching mode and domain zero wasn't special.

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/pci/intel-iommu.c

index 420afa887283709d7f65806310e8553d78868ff9..3cad7006ed8eb532a88c3a97a2ef98752efa403d 100644 (file)
@@ -1054,7 +1054,12 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, u16 did,
        else
                iommu->flush.flush_iotlb(iommu, did, addr, mask,
                                                DMA_TLB_PSI_FLUSH);
-       if (did)
+
+       /*
+        * In caching mode, domain ID 0 is reserved for non-present to present
+        * mapping flush. Device IOTLB doesn't need to be flushed in this case.
+        */
+       if (!cap_caching_mode(iommu->cap) || did)
                iommu_flush_dev_iotlb(iommu->domains[did], addr, mask);
 }