return DO_ISA && board->bustype == isa_bustype;
}
+/*
+ * Read 8-bit register.
+ */
+static unsigned char dio200_read8(struct comedi_device *dev,
+ unsigned int offset)
+{
+ return inb(dev->iobase + offset);
+}
+
+/*
+ * Write 8-bit register.
+ */
+static void dio200_write8(struct comedi_device *dev, unsigned int offset,
+ unsigned char val)
+{
+ outb(val, dev->iobase + offset);
+}
+
/*
* This function looks for a board matching the supplied PCI device.
*/
if (layout->has_int_sce) {
/* Just read the interrupt status register. */
- data[1] = inb(dev->iobase + subpriv->ofs) & subpriv->valid_isns;
+ data[1] = dio200_read8(dev, subpriv->ofs) & subpriv->valid_isns;
} else {
/* No interrupt status register. */
data[0] = 0;
subpriv->active = 0;
subpriv->enabled_isns = 0;
if (layout->has_int_sce)
- outb(0, dev->iobase + subpriv->ofs);
+ dio200_write8(dev, subpriv->ofs, 0);
}
/*
/* Enable interrupt sources. */
subpriv->enabled_isns = isn_bits;
if (layout->has_int_sce)
- outb(isn_bits, dev->iobase + subpriv->ofs);
+ dio200_write8(dev, subpriv->ofs, isn_bits);
}
return retval;
* loop in case of misconfiguration.
*/
cur_enabled = subpriv->enabled_isns;
- while ((intstat = (inb(dev->iobase + subpriv->ofs) &
+ while ((intstat = (dio200_read8(dev, subpriv->ofs) &
subpriv->valid_isns & ~triggered)) != 0) {
triggered |= intstat;
cur_enabled &= ~triggered;
- outb(cur_enabled, dev->iobase + subpriv->ofs);
+ dio200_write8(dev, subpriv->ofs, cur_enabled);
}
} else {
/*
*/
cur_enabled = subpriv->enabled_isns;
if (layout->has_int_sce)
- outb(cur_enabled, dev->iobase + subpriv->ofs);
+ dio200_write8(dev, subpriv->ofs, cur_enabled);
if (subpriv->active) {
/*
if (layout->has_int_sce)
/* Disable interrupt sources. */
- outb(0, dev->iobase + subpriv->ofs);
+ dio200_write8(dev, subpriv->ofs, 0);
s->private = subpriv;
s->type = COMEDI_SUBD_DI;
/* latch counter */
val = chan << 6;
- outb(val, dev->iobase + subpriv->ofs + i8254_control_reg);
+ dio200_write8(dev, subpriv->ofs + i8254_control_reg, val);
/* read lsb, msb */
- val = inb(dev->iobase + subpriv->ofs + chan);
- val += inb(dev->iobase + subpriv->ofs + chan) << 8;
+ val = dio200_read8(dev, subpriv->ofs + chan);
+ val += dio200_read8(dev, subpriv->ofs + chan) << 8;
return val;
}
struct dio200_subdev_8254 *subpriv = s->private;
/* write lsb, msb */
- outb(count & 0xff, dev->iobase + subpriv->ofs + chan);
- outb((count >> 8) & 0xff, dev->iobase + subpriv->ofs + chan);
+ dio200_write8(dev, subpriv->ofs + chan, count & 0xff);
+ dio200_write8(dev, subpriv->ofs + chan, (count >> 8) & 0xff);
}
/*
byte = chan << 6;
byte |= 0x30; /* access order: lsb, msb */
byte |= (mode & 0xf); /* counter mode and BCD|binary */
- outb(byte, dev->iobase + subpriv->ofs + i8254_control_reg);
+ dio200_write8(dev, subpriv->ofs + i8254_control_reg, byte);
}
/*
struct dio200_subdev_8254 *subpriv = s->private;
/* latch status */
- outb(0xe0 | (2 << chan),
- dev->iobase + subpriv->ofs + i8254_control_reg);
+ dio200_write8(dev, subpriv->ofs + i8254_control_reg,
+ 0xe0 | (2 << chan));
/* read status */
- return inb(dev->iobase + subpriv->ofs + chan);
+ return dio200_read8(dev, subpriv->ofs + chan);
}
/*
subpriv->gate_src[counter_number] = gate_src;
byte = GAT_SCE(subpriv->which, counter_number, gate_src);
- outb(byte, dev->iobase + subpriv->gat_sce_ofs);
+ dio200_write8(dev, subpriv->gat_sce_ofs, byte);
return 0;
}
subpriv->clock_src[counter_number] = clock_src;
byte = CLK_SCE(subpriv->which, counter_number, clock_src);
- outb(byte, dev->iobase + subpriv->clk_sce_ofs);
+ dio200_write8(dev, subpriv->clk_sce_ofs, byte);
return 0;
}
config |= CR_C_LO_IO;
if (!(s->io_bits & 0xf00000))
config |= CR_C_HI_IO;
- outb(config, dev->iobase + subpriv->ofs + 3);
+ dio200_write8(dev, subpriv->ofs + 3, config);
}
/*
s->state &= ~data[0];
s->state |= (data[0] & data[1]);
if (data[0] & 0xff)
- outb(s->state & 0xff, dev->iobase + subpriv->ofs);
+ dio200_write8(dev, subpriv->ofs, s->state & 0xff);
if (data[0] & 0xff00)
- outb((s->state >> 8) & 0xff,
- dev->iobase + subpriv->ofs + 1);
+ dio200_write8(dev, subpriv->ofs + 1,
+ (s->state >> 8) & 0xff);
if (data[0] & 0xff0000)
- outb((s->state >> 16) & 0xff,
- dev->iobase + subpriv->ofs + 2);
+ dio200_write8(dev, subpriv->ofs + 2,
+ (s->state >> 16) & 0xff);
}
- data[1] = inb(dev->iobase + subpriv->ofs);
- data[1] |= inb(dev->iobase + subpriv->ofs + 1) << 8;
- data[1] |= inb(dev->iobase + subpriv->ofs + 2) << 16;
+ data[1] = dio200_read8(dev, subpriv->ofs);
+ data[1] |= dio200_read8(dev, subpriv->ofs + 1) << 8;
+ data[1] |= dio200_read8(dev, subpriv->ofs + 2) << 16;
return 2;
}