efikamx: add reset

The efikamx board is using a gpio to reset the board so add support
for it

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index f84452f8ef748fdc63d2120afd49da8a7e25f5c2..4b2718b3e51767471462736db38bc44dd55d6d7b 100644 (file)
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -56,6 +56,10 @@
 #define EFIKAMX_SPI_CS0                (3*32 + 24)
 #define EFIKAMX_SPI_CS1                (3*32 + 25)
 
+/* board 1.1 doesn't have same reset gpio */
+#define EFIKAMX_RESET1_1       (2*32 + 2)
+#define EFIKAMX_RESET          (0*32 + 4)
+
 /* the pci ids pin have pull up. they're driven low according to board id */
 #define MX51_PAD_PCBID0        IOMUX_PAD(0x518, 0x130, 3, 0x0,   0, PAD_CTL_PUS_100K_UP)
 #define MX51_PAD_PCBID1        IOMUX_PAD(0x51C, 0x134, 3, 0x0,   0, PAD_CTL_PUS_100K_UP)
@@ -110,6 +114,10 @@ static iomux_v3_cfg_t mx51efikamx_pads[] = {
        MX51_PAD_CSPI1_SS1__GPIO_4_25,
        MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
        MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
+
+       /* reset */
+       MX51_PAD_DI1_PIN13__GPIO_3_2,
+       MX51_PAD_GPIO_1_4__GPIO_1_4,
 };
 
 /* Serial ports */
@@ -296,6 +304,14 @@ static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
        .num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
 };
 
+void mx51_efikamx_reset(void)
+{
+       if (system_rev == 0x11)
+               gpio_direction_output(EFIKAMX_RESET1_1, 0);
+       else
+               gpio_direction_output(EFIKAMX_RESET, 0);
+}
+
 static void __init mxc_board_init(void)
 {
        mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
@@ -317,6 +333,14 @@ static void __init mxc_board_init(void)
        spi_register_board_info(mx51_efikamx_spi_board_info,
                ARRAY_SIZE(mx51_efikamx_spi_board_info));
        imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
+
+       if (system_rev == 0x11) {
+               gpio_request(EFIKAMX_RESET1_1, "reset");
+               gpio_direction_output(EFIKAMX_RESET1_1, 1);
+       } else {
+               gpio_request(EFIKAMX_RESET, "reset");
+               gpio_direction_output(EFIKAMX_RESET, 1);
+       }
 }
 
 static void __init mx51_efikamx_timer_init(void)

diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 7a1e1f89ff0934f36eeebd0dae3b5e0c356a8ea5..05676fbd1d63eca4bef330ee736600f14bcab555 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -50,5 +50,5 @@ extern void mxc_arch_reset_init(void __iomem *);
 extern void mxc91231_power_off(void);
 extern void mxc91231_arch_reset(int, const char *);
 extern void mxc91231_prepare_idle(void);
-
+extern void mx51_efikamx_reset(void);
 #endif

diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 925bce4607e78bc91f2fb4605e4c8d5195027ff2..c3972c583840ff851b817f07b134b2ed8bc6e6f6 100644 (file)
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -26,6 +26,7 @@
 #include <mach/common.h>
 #include <asm/proc-fns.h>
 #include <asm/system.h>
+#include <asm/mach-types.h>
 
 static void __iomem *wdog_base;
 
@@ -42,6 +43,13 @@ void arch_reset(char mode, const char *cmd)
                return;
        }
 #endif
+#ifdef CONFIG_MACH_MX51_EFIKAMX
+       if (machine_is_mx51_efikamx()) {
+               mx51_efikamx_reset();
+               return;
+       }
+#endif
+
        if (cpu_is_mx1()) {
                wcr_enable = (1 << 0);
        } else {