]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: dts: at91: Fix USB endpoint nodes
authorAlexandre Belloni <alexandre.belloni@free-electrons.com>
Tue, 12 Jul 2016 20:45:59 +0000 (22:45 +0200)
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>
Fri, 15 Jul 2016 08:23:31 +0000 (10:23 +0200)
Endpoint nodes have a reg property. Add their mandatory unit-address.

This solves:
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep0 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep1 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep2 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep3 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep4 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep5 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep6 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep7 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep8 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep9 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep10 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep11 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep12 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep13 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep14 has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /ahb/gadget@00400000/ep15 has a reg or ranges property, but no unit name

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9rl.dtsi
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/boot/dts/sama5d2.dtsi
arch/arm/boot/dts/sama5d3.dtsi
arch/arm/boot/dts/sama5d4.dtsi

index 048a9815a9e5983f1293ee5e381c06bd5cd734c8..c8789a8a0a1d0487e212bd92996039b729670991 100644 (file)
                                clock-names = "pclk", "hclk";
                                status = "disabled";
 
-                               ep0 {
+                               ep@0 {
                                        reg = <0>;
                                        atmel,fifo-size = <64>;
                                        atmel,nb-banks = <1>;
                                };
 
-                               ep1 {
+                               ep@1 {
                                        reg = <1>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <2>;
                                        atmel,can-isoc;
                                };
 
-                               ep2 {
+                               ep@2 {
                                        reg = <2>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <2>;
                                        atmel,can-isoc;
                                };
 
-                               ep3 {
+                               ep@3 {
                                        reg = <3>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-dma;
                                };
 
-                               ep4 {
+                               ep@4 {
                                        reg = <4>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-dma;
                                };
 
-                               ep5 {
+                               ep@5 {
                                        reg = <5>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-isoc;
                                };
 
-                               ep6 {
+                               ep@6 {
                                        reg = <6>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
index 201a3ca568748646507c316863d4a60dc9211d22..cdaae8eb038c7b3507e473f79555c1232ba6c54e 100644 (file)
                                clock-names = "pclk", "hclk";
                                status = "disabled";
 
-                               ep0 {
+                               ep@0 {
                                        reg = <0>;
                                        atmel,fifo-size = <64>;
                                        atmel,nb-banks = <1>;
                                };
 
-                               ep1 {
+                               ep@1 {
                                        reg = <1>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <2>;
                                        atmel,can-isoc;
                                };
 
-                               ep2 {
+                               ep@2 {
                                        reg = <2>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <2>;
                                        atmel,can-isoc;
                                };
 
-                               ep3 {
+                               ep@3 {
                                        reg = <3>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-dma;
                                };
 
-                               ep4 {
+                               ep@4 {
                                        reg = <4>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-dma;
                                };
 
-                               ep5 {
+                               ep@5 {
                                        reg = <5>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-isoc;
                                };
 
-                               ep6 {
+                               ep@6 {
                                        reg = <6>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
index 075d5881770dc1e976ec05b2dffe75d66c3f0894..f14ed909236c689f9eebede74b3271e174e022a9 100644 (file)
                                clock-names = "hclk", "pclk";
                                status = "disabled";
 
-                               ep0 {
+                               ep@0 {
                                        reg = <0>;
                                        atmel,fifo-size = <64>;
                                        atmel,nb-banks = <1>;
                                };
 
-                               ep1 {
+                               ep@1 {
                                        reg = <1>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <2>;
                                        atmel,can-isoc;
                                };
 
-                               ep2 {
+                               ep@2 {
                                        reg = <2>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <2>;
                                        atmel,can-isoc;
                                };
 
-                               ep3 {
+                               ep@3 {
                                        reg = <3>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-dma;
                                };
 
-                               ep4 {
+                               ep@4 {
                                        reg = <4>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-dma;
                                };
 
-                               ep5 {
+                               ep@5 {
                                        reg = <5>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
                                        atmel,can-isoc;
                                };
 
-                               ep6 {
+                               ep@6 {
                                        reg = <6>;
                                        atmel,fifo-size = <1024>;
                                        atmel,nb-banks = <3>;
index 5d63206aab919d181ca7e70239ab0b1b27a62663..c885d2b153ca73224cdfda45cb7ac0a8253dbfb3 100644 (file)
                        clock-names = "pclk", "hclk";
                        status = "disabled";
 
-                       ep0 {
+                       ep@0 {
                                reg = <0>;
                                atmel,fifo-size = <64>;
                                atmel,nb-banks = <1>;
                        };
 
-                       ep1 {
+                       ep@1 {
                                reg = <1>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <3>;
                                atmel,can-isoc;
                        };
 
-                       ep2 {
+                       ep@2 {
                                reg = <2>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <3>;
                                atmel,can-isoc;
                        };
 
-                       ep3 {
+                       ep@3 {
                                reg = <3>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep4 {
+                       ep@4 {
                                reg = <4>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep5 {
+                       ep@5 {
                                reg = <5>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep6 {
+                       ep@6 {
                                reg = <6>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep7 {
+                       ep@7 {
                                reg = <7>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep8 {
+                       ep@8 {
                                reg = <8>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep9 {
+                       ep@9 {
                                reg = <9>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep10 {
+                       ep@10 {
                                reg = <10>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep11 {
+                       ep@11 {
                                reg = <11>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep12 {
+                       ep@12 {
                                reg = <12>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep13 {
+                       ep@13 {
                                reg = <13>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep14 {
+                       ep@14 {
                                reg = <14>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep15 {
+                       ep@15 {
                                reg = <15>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
index a7c5cf4d4ea59b7218aaa9240e413f5548139819..4c84d333fc7e60247bc9325ea132872d2b3d0011 100644 (file)
                        clock-names = "pclk", "hclk";
                        status = "disabled";
 
-                       ep0 {
+                       ep@0 {
                                reg = <0>;
                                atmel,fifo-size = <64>;
                                atmel,nb-banks = <1>;
                        };
 
-                       ep1 {
+                       ep@1 {
                                reg = <1>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <3>;
                                atmel,can-isoc;
                        };
 
-                       ep2 {
+                       ep@2 {
                                reg = <2>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <3>;
                                atmel,can-isoc;
                        };
 
-                       ep3 {
+                       ep@3 {
                                reg = <3>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-dma;
                        };
 
-                       ep4 {
+                       ep@4 {
                                reg = <4>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-dma;
                        };
 
-                       ep5 {
+                       ep@5 {
                                reg = <5>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-dma;
                        };
 
-                       ep6 {
+                       ep@6 {
                                reg = <6>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-dma;
                        };
 
-                       ep7 {
+                       ep@7 {
                                reg = <7>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-dma;
                        };
 
-                       ep8 {
+                       ep@8 {
                                reg = <8>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep9 {
+                       ep@9 {
                                reg = <9>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep10 {
+                       ep@10 {
                                reg = <10>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep11 {
+                       ep@11 {
                                reg = <11>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep12 {
+                       ep@12 {
                                reg = <12>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep13 {
+                       ep@13 {
                                reg = <13>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep14 {
+                       ep@14 {
                                reg = <14>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                        };
 
-                       ep15 {
+                       ep@15 {
                                reg = <15>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
index 5a9f50fb8d650765af67fd208e9fcb3dbf457198..65e725fb567986b3db1687056c4c74df2f9bd003 100644 (file)
                        clock-names = "pclk", "hclk";
                        status = "disabled";
 
-                       ep0 {
+                       ep@0 {
                                reg = <0>;
                                atmel,fifo-size = <64>;
                                atmel,nb-banks = <1>;
                        };
 
-                       ep1 {
+                       ep@1 {
                                reg = <1>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <3>;
                                atmel,can-isoc;
                        };
 
-                       ep2 {
+                       ep@2 {
                                reg = <2>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <3>;
                                atmel,can-isoc;
                        };
 
-                       ep3 {
+                       ep@3 {
                                reg = <3>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep4 {
+                       ep@4 {
                                reg = <4>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep5 {
+                       ep@5 {
                                reg = <5>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep6 {
+                       ep@6 {
                                reg = <6>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep7 {
+                       ep@7 {
                                reg = <7>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep8 {
+                       ep@8 {
                                reg = <8>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep9 {
+                       ep@9 {
                                reg = <9>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep10 {
+                       ep@10 {
                                reg = <10>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep11 {
+                       ep@11 {
                                reg = <11>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep12 {
+                       ep@12 {
                                reg = <12>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep13 {
+                       ep@13 {
                                reg = <13>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep14 {
+                       ep@14 {
                                reg = <14>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;
                                atmel,can-isoc;
                        };
 
-                       ep15 {
+                       ep@15 {
                                reg = <15>;
                                atmel,fifo-size = <1024>;
                                atmel,nb-banks = <2>;