]> git.karo-electronics.de Git - mv-sheeva.git/commitdiff
[MIPS] Fix R4K cache macro names
authorKumba <kumba@gentoo.org>
Sun, 18 Jun 2006 06:17:01 +0000 (02:17 -0400)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 19 Jun 2006 16:39:26 +0000 (17:39 +0100)
Several machines have the R4K cache macro name spelled incorrectly.  Namely,
they have cpu_has_4kcache defined instead of cpu_has_4k_cache.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
include/asm-mips/mach-ip22/cpu-feature-overrides.h
include/asm-mips/mach-mips/cpu-feature-overrides.h
include/asm-mips/mach-rm200/cpu-feature-overrides.h
include/asm-mips/mach-sim/cpu-feature-overrides.h

index 2a37bedb40535b02f4aad8cd2beccdc1a8f3679d..f7c5dc8a5336663c3b2fe1f3443e3ace396a5f40 100644 (file)
@@ -13,7 +13,7 @@
  */
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
-#define cpu_has_4kcache                1
+#define cpu_has_4k_cache       1
 #define cpu_has_fpu            1
 #define cpu_has_32fpr          1
 #define cpu_has_counter                1
index e06af6c86f8660818f6ff0bdb906e75fb1e9c3aa..12c937283bb43c0ff574b26fa929043510a1bf11 100644 (file)
@@ -17,7 +17,7 @@
 #ifdef CONFIG_CPU_MIPS32
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
-#define cpu_has_4kcache                1
+#define cpu_has_4k_cache       1
 /* #define cpu_has_fpu         ? */
 /* #define cpu_has_32fpr       ? */
 #define cpu_has_counter                1
@@ -47,7 +47,7 @@
 #ifdef CONFIG_CPU_MIPS64
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
-#define cpu_has_4kcache                1
+#define cpu_has_4k_cache       1
 /* #define cpu_has_fpu         ? */
 /* #define cpu_has_32fpr       ? */
 #define cpu_has_counter                1
index 01587832bc9c63d8748d3229692f12330baf1155..11410ae10d36236aaaef1cc24d44578d5a570726 100644 (file)
@@ -14,7 +14,7 @@
 
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
-#define cpu_has_4kcache                1
+#define cpu_has_4k_cache       1
 #define cpu_has_fpu            1
 #define cpu_has_32fpr          1
 #define cpu_has_counter                1
index cadbe8eda79c540e9fd0c555c4201a16f98ce007..d9653e47d5fcc606adbf03d044f9f2b57502c51c 100644 (file)
@@ -16,7 +16,7 @@
 #ifdef CONFIG_CPU_MIPS32
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
-#define cpu_has_4kcache                1
+#define cpu_has_4k_cache       1
 #define cpu_has_fpu            0
 /* #define cpu_has_32fpr       ? */
 #define cpu_has_counter                1
@@ -41,7 +41,7 @@
 #ifdef CONFIG_CPU_MIPS64
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
-#define cpu_has_4kcache                1
+#define cpu_has_4k_cache       1
 /* #define cpu_has_fpu         ? */
 /* #define cpu_has_32fpr       ? */
 #define cpu_has_counter                1