ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock

This patch changes apll_pcie_m2_ck to fixed factor
clock as there are no configurable divider associated to m2.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index d4e7410dc0cd3e7bea9a8f316bf430272250d633..d616359baed1d5c8896bde2f767e4745e790f8c7 100644 (file)
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1183,13 +1183,10 @@
 
        apll_pcie_m2_ck: apll_pcie_m2_ck {
                #clock-cells = <0>;
-               compatible = "ti,divider-clock";
+               compatible = "fixed-factor-clock";
                clocks = <&apll_pcie_ck>;
-               ti,max-div = <127>;
-               ti,autoidle-shift = <8>;
-               reg = <0x0224>;
-               ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
+               clock-mult = <1>;
+               clock-div = <1>;
        };
 
        dpll_per_ck: dpll_per_ck {