]> git.karo-electronics.de Git - linux-beck.git/commitdiff
pinctrl: sh-pfc: r8a7796: Add voltage switch operations for SDHI
authorSimon Horman <horms+renesas@verge.net.au>
Thu, 8 Sep 2016 11:57:33 +0000 (13:57 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 12 Sep 2016 08:58:23 +0000 (10:58 +0200)
This patch supports the {get,set}_io_voltage operations of SDHI.

This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v
voltage switch.

Based on work by Takeshi Kihara and Wolfram Sang.

Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7796.c

index f8ab74dd0506c209716ae5b1237df0df21e369e6..dc9b671ccf2e51261d26becbbe32572de67b6b2e 100644 (file)
        PORT_GP_16(0, fn, sfx),                                         \
        PORT_GP_29(1, fn, sfx),                                         \
        PORT_GP_15(2, fn, sfx),                                         \
-       PORT_GP_16(3, fn, sfx),                                         \
-       PORT_GP_18(4, fn, sfx),                                         \
+       PORT_GP_CFG_12(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),          \
+       PORT_GP_1(3, 12, fn, sfx),                                      \
+       PORT_GP_1(3, 13, fn, sfx),                                      \
+       PORT_GP_1(3, 14, fn, sfx),                                      \
+       PORT_GP_1(3, 15, fn, sfx),                                      \
+       PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE),          \
        PORT_GP_26(5, fn, sfx),                                         \
        PORT_GP_32(6, fn, sfx),                                         \
        PORT_GP_4(7, fn, sfx)
@@ -2627,8 +2631,28 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
        { },
 };
 
+static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
+{
+       int bit = -EINVAL;
+
+       *pocctrl = 0xe6060380;
+
+       if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
+               bit = pin & 0x1f;
+
+       if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17))
+               bit = (pin & 0x1f) + 12;
+
+       return bit;
+}
+
+static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = {
+       .pin_to_pocctrl = r8a7796_pin_to_pocctrl,
+};
+
 const struct sh_pfc_soc_info r8a7796_pinmux_info = {
        .name = "r8a77960_pfc",
+       .ops = &r8a7796_pinmux_ops,
        .unlock_reg = 0xe6060000, /* PMMR */
 
        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },