config MACH_MX27ADS
bool "MX27ADS platform"
+ select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for MX27ADS platform. This includes specific
config MACH_PCM038
bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
+ select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_MXC_NAND
select MXC_ULPI if USB_ULPI
help
config MACH_CPUIMX27
bool "Eukrea CPUIMX27 module"
+ select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for Eukrea CPUIMX27 platform. This includes
config MACH_PCA100
bool "Phytec phyCARD-s (pca100)"
+ select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_MXC_NAND
select MXC_ULPI if USB_ULPI
help
config MACH_MXT_TD60
bool "Maxtrack i-MXT TD60"
+ select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for i-MXT (aka td60) platform. This
#include <mach/mx27.h>
#include <mach/devices-common.h>
+#define imx27_add_i2c_imx0(pdata) \
+ imx_add_imx_i2c(0, MX27_I2C1_BASE_ADDR, SZ_4K, MX27_INT_I2C1, pdata)
+#define imx27_add_i2c_imx1(pdata) \
+ imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata)
+
#define imx27_add_mxc_nand(pdata) \
imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata)
};
#endif
-#ifdef CONFIG_MACH_MX27
-#define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq) \
- static struct resource mxc_i2c_resources ## n[] = { \
- { \
- .start = baseaddr, \
- .end = baseaddr + SZ_4K - 1, \
- .flags = IORESOURCE_MEM, \
- }, { \
- .start = irq, \
- .end = irq, \
- .flags = IORESOURCE_IRQ, \
- } \
- }; \
- \
- struct platform_device mxc_i2c_device ## n = { \
- .name = "imx-i2c", \
- .id = n, \
- .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n), \
- .resource = mxc_i2c_resources ## n, \
- }
-
-DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
-
-DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
-#endif
-
static struct resource mxc_pwm_resources[] = {
{
.start = MX2x_PWM_BASE_ADDR,
extern struct platform_device mxc_fb_device;
extern struct platform_device mxc_fec_device;
extern struct platform_device mxc_pwm_device;
-#ifdef CONFIG_MACH_MX27
-extern struct platform_device mxc_i2c_device0;
-extern struct platform_device mxc_i2c_device1;
-#endif
extern struct platform_device mxc_sdhc_device0;
extern struct platform_device mxc_sdhc_device1;
extern struct platform_device mxc_otg_udc_device;
#include <mach/board-eukrea_cpuimx27.h>
#include <mach/common.h>
#include <mach/hardware.h>
-#include <mach/i2c.h>
#include <mach/iomux-mx27.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
&mxc_fec_device,
};
-static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = {
+static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
.bitrate = 100000,
};
i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
- mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data);
+ imx27_add_i2c_imx1(&cpuimx27_i2c1_data);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
#include <mach/imx-uart.h>
#include <mach/iomux-mx27.h>
#include <mach/mxc_nand.h>
-#include <mach/i2c.h>
#include <mach/imxfb.h>
#include <mach/mmc.h>
.resource = &mx27ads_flash_resource,
};
-static struct imxi2c_platform_data mx27ads_i2c_data = {
+static const struct imxi2c_platform_data mx27ads_i2c1_data __initconst = {
.bitrate = 100000,
};
/* only the i2c master 1 is used on this CPU card */
i2c_register_board_info(1, mx27ads_i2c_devices,
ARRAY_SIZE(mx27ads_i2c_devices));
- mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data);
+ imx27_add_i2c_imx1(&mx27ads_i2c1_data);
mxc_register_device(&mxc_fb_device, &mx27ads_fb_data);
mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata);
#include <mach/imx-uart.h>
#include <mach/iomux-mx27.h>
#include <mach/mxc_nand.h>
-#include <mach/i2c.h>
#include <linux/i2c/pca953x.h>
#include <mach/imxfb.h>
#include <mach/mmc.h>
.hw_ecc = 1,
};
-static struct imxi2c_platform_data mxt_td60_i2c_data = {
+static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
.bitrate = 100000,
};
},
};
-static struct imxi2c_platform_data mxt_td60_i2c2_data = {
+static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
.bitrate = 100000,
};
i2c_register_board_info(1, mxt_td60_i2c2_devices,
ARRAY_SIZE(mxt_td60_i2c2_devices));
- mxc_register_device(&mxc_i2c_device0, &mxt_td60_i2c_data);
- mxc_register_device(&mxc_i2c_device1, &mxt_td60_i2c2_data);
+ imx27_add_i2c_imx0(&mxt_td60_i2c0_data);
+ imx27_add_i2c_imx1(&mxt_td60_i2c1_data);
mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data);
mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
-#include <mach/i2c.h>
#include <asm/mach/time.h>
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
#include <mach/spi.h>
&mxc_wdt,
};
-static struct imxi2c_platform_data pca100_i2c_1_data = {
+static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
.bitrate = 100000,
};
i2c_register_board_info(1, pca100_i2c_devices,
ARRAY_SIZE(pca100_i2c_devices));
- mxc_register_device(&mxc_i2c_device1, &pca100_i2c_1_data);
+ imx27_add_i2c_imx1(&pca100_i2c1_data);
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_OUT);
#include <mach/board-pcm038.h>
#include <mach/common.h>
#include <mach/hardware.h>
-#include <mach/i2c.h>
#include <mach/iomux-mx27.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
}
-static struct imxi2c_platform_data pcm038_i2c_1_data = {
+static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
.bitrate = 100000,
};
i2c_register_board_info(1, pcm038_i2c_devices,
ARRAY_SIZE(pcm038_i2c_devices));
- mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
+ imx27_add_i2c_imx1(&pcm038_i2c1_data);
/* PE18 for user-LED D40 */
mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
#define MX27_CSPI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0f000)
#define MX27_SSI1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x10000)
#define MX27_SSI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x11000)
-#define MX27_I2C_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x12000)
+#define MX27_I2C1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x12000)
#define MX27_SDHC1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x13000)
#define MX27_SDHC2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x14000)
#define MX27_GPIO_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x15000)
#define MX27_INT_SDHC3 9
#define MX27_INT_SDHC2 10
#define MX27_INT_SDHC1 11
-#define MX27_INT_I2C 12
+#define MX27_INT_I2C1 12
#define MX27_INT_SSI2 13
#define MX27_INT_SSI1 14
#define MX27_INT_CSPI2 15