compatible = "fsl,imx6q-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>;
+ #clock-cells = <1>;
};
- anatop@020c8000 {
- compatible = "fsl,imx6q-anatop";
+ anatop: anatop@020c8000 {
+ compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
reg = <0x020c8000 0x1000>;
interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
#ifndef _ASMARM_TIMEX_H
#define _ASMARM_TIMEX_H
-#include <asm/arch_timer.h>
+ #ifdef CONFIG_ARCH_MULTIPLATFORM
+ #define CLOCK_TICK_RATE 1000000
+ #else
#include <mach/timex.h>
+ #endif
typedef unsigned long cycles_t;
-
-#ifdef ARCH_HAS_READ_CURRENT_TIMER
#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; })
-#else
-#define get_cycles() (0)
-#endif
#endif
process.o ptrace.o return_address.o sched_clock.o \
setup.o signal.o stacktrace.o sys_arm.o time.o traps.o
-obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o
+obj-$(CONFIG_ATAGS) += atags_parse.o
+obj-$(CONFIG_ATAGS_PROC) += atags_proc.o
+obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += atags_compat.o
- obj-$(CONFIG_LEDS) += leds.o
obj-$(CONFIG_OC_ETM) += etm.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ISA_DMA_API) += dma.o
#include <linux/percpu.h>
#include <linux/clockchips.h>
#include <linux/completion.h>
+#include <linux/cpufreq.h>
#include <linux/atomic.h>
+ #include <asm/smp.h>
#include <asm/cacheflush.h>
#include <asm/cpu.h>
#include <asm/cputype.h>
*/
struct secondary_data secondary_data;
+ /*
+ * control for which core is the next to come out of the secondary
+ * boot "holding pen"
+ */
+ volatile int __cpuinitdata pen_release = -1;
+
enum ipi_msg_type {
- IPI_TIMER = 2,
+ IPI_WAKEUP,
+ IPI_TIMER,
IPI_RESCHEDULE,
IPI_CALL_FUNC,
IPI_CALL_FUNC_SINGLE,
#include <linux/davinci_emac.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/davinci_asp.h>
- #include <mach/keyscan.h>
-#include <mach/asp.h>
+ #include <linux/platform_data/keyscan-davinci.h>
#include <mach/hardware.h>
+#include <mach/edma.h>
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
- #include <mach/spi.h>
-#include <mach/asp.h>
+ #include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
#include "davinci.h"
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
- #include <mach/keyscan.h>
- #include <mach/spi.h>
-#include <mach/asp.h>
+ #include <linux/platform_data/keyscan-davinci.h>
+ #include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
#include "davinci.h"
#include <mach/serial.h>
#include <mach/edma.h>
- #include <mach/i2c.h>
- #include <mach/mmc.h>
- #include <mach/usb.h>
-#include <mach/asp.h>
#include <mach/pm.h>
- #include <mach/spi.h>
+ #include <linux/platform_data/i2c-davinci.h>
+ #include <linux/platform_data/mmc-davinci.h>
+ #include <linux/platform_data/usb-davinci.h>
+ #include <linux/platform_data/spi-davinci.h>
extern void __iomem *da8xx_syscfg0_base;
extern void __iomem *da8xx_syscfg1_base;
#include <plat/devs.h>
#include <plat/fb.h>
#include <plat/gpio-cfg.h>
- #include <plat/iic.h>
+ #include <linux/platform_data/i2c-s3c2410.h>
#include <plat/keypad.h>
#include <plat/mfc.h>
-#include <plat/regs-fb.h>
#include <plat/regs-serial.h>
#include <plat/sdhci.h>
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");
+ clk_register_clkdev(clk[nfc_gate], NULL, "63fdb000.nand");
+ clk_register_clkdev(clk[can1_ipg_gate], "ipg", "53fc8000.can");
+ clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can");
+ clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can");
+ clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can");
/* set SDHC root clock to 200MHZ*/
clk_set_rate(clk[esdhc_a_podf], 200000000);
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
- #include <linux/pinctrl/machine.h>
#include <linux/phy.h>
+#include <linux/regmap.h>
#include <linux/micrel_phy.h>
-#include <linux/mfd/anatop.h>
+#include <linux/mfd/syscon.h>
#include <asm/cpuidle.h>
#include <asm/smp_twd.h>
#include <asm/hardware/cache-l2x0.h>
{
iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
vga_base = PCI_MEMORY_VADDR;
+ pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
}
-#define INTEGRATOR_SC_VALID_INT 0x003fffff
-
-static void __init ap_init_irq(void)
-{
- /* Disable all interrupts initially. */
- /* Do the core module ones */
- writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
-
- /* do the header card stuff next */
- writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
- writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
-
- fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
- -1, INTEGRATOR_SC_VALID_INT, NULL);
- integrator_clk_init(false);
-}
-
#ifdef CONFIG_PM
static unsigned long ic_irq_enable;
#define INTCP_PA_CLCD_BASE 0xc0000000
- #define INTCP_VA_CTRL_BASE IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
-#define INTCP_VA_CIC_BASE __io_address(INTEGRATOR_HDR_BASE + 0x40)
-#define INTCP_VA_PIC_BASE __io_address(INTEGRATOR_IC_BASE)
-#define INTCP_VA_SIC_BASE __io_address(INTEGRATOR_CP_SIC_BASE)
-
-#define INTCP_ETH_SIZE 0x10
-
+ #define INTCP_VA_CTRL_BASE __io_address(INTEGRATOR_CP_CTL_BASE)
#define INTCP_FLASHPROG 0x04
#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1)
#include <plat/gpio-nomadik.h>
#include <plat/mtu.h>
+#include <plat/pincfg.h>
- #include <mach/nand.h>
+ #include <linux/platform_data/mtd-nomadik-nand.h>
#include <mach/fsmc.h>
#include "cpu-8815.h"
#include "common.h"
#include <plat/dma.h>
#include <plat/gpmc.h>
- #include <plat/onenand.h>
- #include <plat/gpmc-smc91x.h>
+#include <plat/omap-pm.h>
+ #include "gpmc-smc91x.h"
- #include <mach/board-rx51.h>
+ #include "board-rx51.h"
#include <sound/tlv320aic3x.h>
#include <sound/tpa6130a2-plat.h>
return ret;
}
-/* EXTMUTE callback function */
-static void zoom2_set_hs_extmute(int mute)
-{
- gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
-}
-
static struct twl4030_gpio_platform_data zoom_gpio_data = {
- .gpio_base = OMAP_MAX_GPIO_LINES,
- .irq_base = TWL4030_GPIO_IRQ_BASE,
- .irq_end = TWL4030_GPIO_IRQ_END,
.setup = zoom_twl_gpio_setup,
};
codec_data->ramp_delay_value = 3; /* 161 ms */
codec_data->hs_extmute = 1;
- codec_data->set_hs_extmute = zoom2_set_hs_extmute;
+ codec_data->hs_extmute_gpio = ZOOM2_HEADSET_EXTMUTE_GPIO;
}
- omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
+ omap_pmic_init(1, 2400, "twl5030", 7 + OMAP_INTC_START, &zoom_twldata);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
return 0;
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
+ #include <linux/platform_data/asoc-ti-mcbsp.h>
- #include <mach/irqs.h>
#include <plat/dma.h>
- #include <plat/cpu.h>
- #include <plat/mcbsp.h>
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
- #include <plat/nand.h>
+ #include <linux/platform_data/mtd-nand-s3c2410.h>
#include <plat/sdhci.h>
- #include <plat/udc.h>
+ #include <linux/platform_data/usb-s3c2410_udc.h>
#include <linux/platform_data/s3c-hsudc.h>
-#include <plat/regs-fb-v4.h>
#include <plat/fb.h>
#include <plat/common-smdk.h>
#include <asm/mach-types.h>
#include <plat/regs-serial.h>
- #include <plat/iic.h>
+ #include <linux/platform_data/i2c-s3c2410.h>
#include <plat/fb.h>
-#include <plat/regs-fb-v4.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/fb.h>
- #include <plat/nand.h>
+ #include <linux/platform_data/mtd-nand-s3c2410.h>
#include <plat/regs-serial.h>
- #include <plat/ts.h>
+ #include <linux/platform_data/touchscreen-s3c2410.h>
-#include <plat/regs-fb-v4.h>
#include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
#include "common.h"
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/fb.h>
- #include <plat/nand.h>
+ #include <linux/platform_data/mtd-nand-s3c2410.h>
#include <plat/regs-serial.h>
- #include <plat/ts.h>
+ #include <linux/platform_data/touchscreen-s3c2410.h>
-#include <plat/regs-fb-v4.h>
#include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
#include "common.h"
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/adc.h>
- #include <plat/ts.h>
+ #include <linux/platform_data/touchscreen-s3c2410.h>
#include <plat/keypad.h>
#include <plat/backlight.h>
-#include <plat/regs-fb-v4.h>
#include "common.h"
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/fb.h>
- #include <plat/iic.h>
- #include <plat/ata.h>
+ #include <linux/platform_data/i2c-s3c2410.h>
+ #include <linux/platform_data/ata-samsung_cf.h>
#include <plat/adc.h>
#include <plat/keypad.h>
- #include <plat/ts.h>
- #include <plat/audio.h>
+ #include <linux/platform_data/touchscreen-s3c2410.h>
+ #include <linux/platform_data/asoc-s3c.h>
#include <plat/backlight.h>
-#include <plat/regs-fb-v4.h>
#include "common.h"
};
- #define GPIO_PORT9CR 0xE6051009
- #define GPIO_PORT10CR 0xE605100A
- #define USCCR1 0xE6058144
+ #define GPIO_PORT9CR IOMEM(0xE6051009)
+ #define GPIO_PORT10CR IOMEM(0xE605100A)
+ #define USCCR1 IOMEM(0xE6058144)
static void __init ap4evb_init(void)
{
+ struct pm_domain_device domain_devices[] = {
+ { "A4LC", &lcdc1_device, },
+ { "A4LC", &lcdc_device, },
+ { "A4MP", &fsi_device, },
+ { "A3SP", &sh_mmcif_device, },
+ { "A3SP", &sdhi0_device, },
+ { "A3SP", &sdhi1_device, },
+ { "A4R", &ceu_device, },
+ };
u32 srcr4;
struct clk *clk;
},
};
- #define GPIO_PORT9CR 0xE6051009
- #define GPIO_PORT10CR 0xE605100A
- #define GPIO_PORT167CR 0xE60520A7
- #define GPIO_PORT168CR 0xE60520A8
- #define SRCR4 0xe61580bc
- #define USCCR1 0xE6058144
+ #define GPIO_PORT9CR IOMEM(0xE6051009)
+ #define GPIO_PORT10CR IOMEM(0xE605100A)
+ #define GPIO_PORT167CR IOMEM(0xE60520A7)
+ #define GPIO_PORT168CR IOMEM(0xE60520A8)
+ #define SRCR4 IOMEM(0xe61580bc)
+ #define USCCR1 IOMEM(0xE6058144)
static void __init mackerel_init(void)
{
+ struct pm_domain_device domain_devices[] = {
+ { "A4LC", &lcdc_device, },
+ { "A4LC", &hdmi_lcdc_device, },
+ { "A4LC", &meram_device, },
+ { "A4MP", &fsi_device, },
+ { "A3SP", &usbhs0_device, },
+ { "A3SP", &usbhs1_device, },
+ { "A3SP", &nand_flash_device, },
+ { "A3SP", &sh_mmcif_device, },
+ { "A3SP", &sdhi0_device, },
+#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
+ { "A3SP", &sdhi1_device, },
+#endif
+ { "A3SP", &sdhi2_device, },
+ { "A4R", &ceu_device, },
+ };
u32 srcr4;
struct clk *clk;
extern void r8a7779_pm_init(void);
extern void r8a7740_meram_workaround(void);
- extern unsigned int r8a7779_get_core_count(void);
- extern int r8a7779_platform_cpu_kill(unsigned int cpu);
- extern void r8a7779_secondary_init(unsigned int cpu);
- extern int r8a7779_boot_secondary(unsigned int cpu);
- extern void r8a7779_smp_prepare_cpus(void);
extern void r8a7779_register_twd(void);
-extern void shmobile_init_late(void);
-
#ifdef CONFIG_SUSPEND
int shmobile_suspend_init(void);
#else
static inline int shmobile_cpuidle_init(void) { return 0; }
#endif
+static inline void shmobile_init_late(void)
+{
+ shmobile_suspend_init();
+ shmobile_cpuidle_init();
+}
+
+ extern void shmobile_cpu_die(unsigned int cpu);
+ extern int shmobile_cpu_disable(unsigned int cpu);
+
+ #ifdef CONFIG_HOTPLUG_CPU
+ extern int shmobile_cpu_is_dead(unsigned int cpu);
+ #else
+ static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; }
+ #endif
+
+ extern void shmobile_smp_init_cpus(unsigned int ncores);
+
#endif /* __ARCH_MACH_COMMON_H */
extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch);
#ifdef CONFIG_PM
-extern struct r8a7779_pm_domain r8a7779_sh4a;
-extern struct r8a7779_pm_domain r8a7779_sgx;
-extern struct r8a7779_pm_domain r8a7779_vdp1;
-extern struct r8a7779_pm_domain r8a7779_impx3;
-
-extern void r8a7779_init_pm_domain(struct r8a7779_pm_domain *r8a7779_pd);
-extern void r8a7779_add_device_to_domain(struct r8a7779_pm_domain *r8a7779_pd,
- struct platform_device *pdev);
+extern void __init r8a7779_init_pm_domains(void);
#else
-#define r8a7779_init_pm_domain(pd) do { } while (0)
-#define r8a7779_add_device_to_domain(pd, pdev) do { } while (0)
+static inline void r8a7779_init_pm_domains(void) {}
#endif /* CONFIG_PM */
+ extern struct smp_operations r8a7779_smp_ops;
+
#endif /* __ASM_R8A7779_H__ */
#define __ASM_ARCH_OMAP_USB_H
#include <linux/io.h>
+#include <linux/platform_device.h>
#include <linux/usb/musb.h>
- #include <plat/board.h>
#define OMAP3_HS_USB_PORTS 3
int clk_set_rate(struct clk *clk, unsigned long rate)
{
+ unsigned long flags;
int ret;
- if (IS_ERR(clk))
+ if (IS_ERR_OR_NULL(clk))
return -EINVAL;
/* We do not default just do a clk->rate = rate as
int clk_set_parent(struct clk *clk, struct clk *parent)
{
+ unsigned long flags;
int ret = 0;
- if (IS_ERR(clk))
+ if (IS_ERR_OR_NULL(clk) || IS_ERR_OR_NULL(parent))
return -EINVAL;
- spin_lock(&clocks_lock);
+ spin_lock_irqsave(&clocks_lock, flags);
if (clk->ops && clk->ops->set_parent)
ret = (clk->ops->set_parent)(clk, parent);
},
{
.compatible = "fsl,ipic-msi",
- .data = (void *)&ipic_msi_feature,
+ .data = &ipic_msi_feature,
},
+#ifdef CONFIG_EPAPR_PARAVIRT
{
.compatible = "fsl,vmpic-msi",
- .data = (void *)&vmpic_msi_feature,
+ .data = &vmpic_msi_feature,
},
+#endif
{}
};
obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
+obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
+ obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
#include <linux/platform_device.h>
#include <linux/device.h>
#include <mach/regs-icu.h>
- #include <mach/sram.h>
+#include <linux/of_device.h>
+ #include <linux/platform_data/dma-mmp_tdma.h>
#include "dmaengine.h"
obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
+obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o
+ obj-$(CONFIG_GPIO_VT8500) += gpio-vt8500.o
obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
#include <linux/slab.h>
#include <linux/cpufreq.h>
#include <linux/gpio.h>
+#include <linux/of_i2c.h>
+#include <linux/of_device.h>
#include <mach/hardware.h>
- #include <mach/i2c.h>
+ #include <linux/platform_data/i2c-davinci.h>
/* ----- global defines ----------------------------------------------- */
{
struct omap_i2c_dev *dev;
struct i2c_adapter *adap;
- struct resource *mem, *irq, *ioarea;
+ struct resource *mem;
- struct omap_i2c_bus_platform_data *pdata = pdev->dev.platform_data;
+ const struct omap_i2c_bus_platform_data *pdata =
+ pdev->dev.platform_data;
struct device_node *node = pdev->dev.of_node;
const struct of_device_id *match;
- irq_handler_t isr;
+ int irq;
int r;
/* NOTE: driver uses the static register mapping */
err3:
device_remove_file(&pdev->dev, &dev_attr_enable);
err2:
- for (i = row_idx - 1; i >=0; i--)
+ for (i = row_idx - 1; i >= 0; i--)
gpio_free(row_gpios[i]);
- err1:
- for (i = col_idx - 1; i >=0; i--)
+ for (i = col_idx - 1; i >= 0; i--)
gpio_free(col_gpios[i]);
kfree(omap_kp);
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/delay.h>
+#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
+#include <linux/edma.h>
#include <linux/mmc/mmc.h>
- #include <mach/mmc.h>
+ #include <linux/platform_data/mmc-davinci.h>
-#include <mach/edma.h>
/*
* Register Definitions
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
+#include <linux/of_device.h>
- #include <mach/nand.h>
- #include <mach/aemif.h>
+ #include <linux/platform_data/mtd-davinci.h>
+ #include <linux/platform_data/mtd-davinci-aemif.h>
/*
* This is a device driver for the NAND flash controller found on the
#include <linux/err.h>
#include <asm/io.h>
#include <asm/sizes.h>
- #include <plat/orion_nand.h>
-#include <mach/hardware.h>
+ #include <linux/platform_data/mtd-orion_nand.h>
static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
-#include <asm/io.h>
-
#include <plat/regs-nand.h>
- #include <plat/nand.h>
+ #include <linux/platform_data/mtd-nand-s3c2410.h>
-#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
-static int hardware_ecc = 1;
-#else
-static int hardware_ecc = 0;
-#endif
-
-#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
-static const int clock_stop = 1;
-#else
-static const int clock_stop = 0;
-#endif
-
-
/* new oob placement block for use with hardware ecc generation
*/
COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
ports of 8 GPIO pins each.
+ config PINCTRL_SAMSUNG
+ bool "Samsung pinctrl driver"
+ select PINMUX
+ select PINCONF
+
+ config PINCTRL_EXYNOS4
+ bool "Pinctrl driver data for Exynos4 SoC"
+ select PINCTRL_SAMSUNG
+
+ config PINCTRL_MVEBU
+ bool
+ depends on ARCH_MVEBU
+ select PINMUX
+ select PINCONF
+
+ config PINCTRL_DOVE
+ bool
+ select PINCTRL_MVEBU
+
+ config PINCTRL_KIRKWOOD
+ bool
+ select PINCTRL_MVEBU
+
+ config PINCTRL_ARMADA_370
+ bool
+ select PINCTRL_MVEBU
+
+ config PINCTRL_ARMADA_XP
+ bool
+ select PINCTRL_MVEBU
+
source "drivers/pinctrl/spear/Kconfig"
+config PINCTRL_XWAY
+ bool
+ depends on SOC_TYPE_XWAY
+ depends on PINCTRL_LANTIQ
+
endmenu
endif
obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
+obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
+obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
+ obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
+ obj-$(CONFIG_PINCTRL_EXYNOS4) += pinctrl-exynos.o
+ obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
+ obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
+ obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
+ obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
+ obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
obj-$(CONFIG_PLAT_SPEAR) += spear/
help
SPI driver for Freescale STMP37xx/378x SoC SSP interface
+config SPI_MXS
+ tristate "Freescale MXS SPI controller"
+ depends on ARCH_MXS
+ select STMP_DEVICE
+ help
+ SPI driver for Freescale MXS devices.
+
config SPI_TEGRA
tristate "Nvidia Tegra SPI controller"
- depends on ARCH_TEGRA && (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
+ depends on ARCH_TEGRA && TEGRA20_APB_DMA
help
SPI driver for NVidia Tegra SoCs
#include <linux/spi/spi_bitbang.h>
#include <linux/slab.h>
- #include <mach/spi.h>
+ #include <linux/platform_data/spi-davinci.h>
-#include <mach/edma.h>
#define SPI_NO_RESOURCE ((resource_size_t)-1)
#include <dspbridge/host_os.h>
- #define INT_34XX_WDT3_IRQ 36
+#define OMAP34XX_WDT3_BASE (0x49000000 + 0x30000)
+ #define INT_34XX_WDT3_IRQ (36 + NR_IRQS)
static struct dsp_wdt_setting dsp_wdt;
depends on USB && USB_ARCH_HAS_OHCI
select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3
select USB_OTG_UTILS if ARCH_OMAP
- depends on USB_ISP1301 || !(ARCH_LPC32XX || ARCH_PNX4008)
- select USB_ISP1301 if ARCH_LPC32XX
++ depends on USB_ISP1301 || !ARCH_LPC32XX
---help---
The Open Host Controller Interface (OHCI) is a standard for accessing
USB 1.1 host controller hardware. It does more in hardware than Intel's
#include <linux/signal.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
#include <mach/hardware.h>
- #include <mach/ohci.h>
- #include <mach/pxa3xx-u2d.h>
+ #include <linux/platform_data/usb-ohci-pxa27x.h>
+ #include <linux/platform_data/usb-pxa3xx-ulpi.h>
/*
* UHC: USB Host Controller (OHCI-like) register definitions
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/sched.h>
- #include <mach/msm_fb.h>
-#include <mach/msm_iomap.h>
-#include <mach/irqs.h>
-#include <mach/board.h>
+ #include <linux/platform_data/video-msm_fb.h>
#include "mddi_hw.h"
#define FLAG_DISABLE_HIBERNATION 0x0001
#include <linux/major.h>
#include <linux/slab.h>
- #include <mach/msm_fb.h>
-#include <mach/msm_iomap.h>
+ #include <linux/platform_data/video-msm_fb.h>
#include <linux/platform_device.h>
#include <linux/export.h>
#ifndef _MDP_HW_H_
#define _MDP_HW_H_
- #include <mach/msm_fb.h>
-#include <mach/msm_iomap.h>
+ #include <linux/platform_data/video-msm_fb.h>
struct mdp_info {
struct mdp_device mdp_dev;
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
-#include <plat/clock.h>
+ #include <plat/cpu.h>
+
#include <video/omapdss.h>
#include "dss.h"
int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */
};
+struct twl6040_gpo_data {
+ int gpio_base;
+};
+
struct twl6040_platform_data {
int audpwron_gpio; /* audio power-on gpio */
- unsigned int irq_base;
struct twl6040_codec_data *codec;
struct twl6040_vibra_data *vibra;
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/pm_runtime.h>
- #include <plat/mcbsp.h>
+ #include <linux/platform_data/asoc-ti-mcbsp.h>
+
+ #include <plat/cpu.h>
#include "mcbsp.h"
#include <sound/initval.h>
#include <sound/soc.h>
- #include <plat/mcbsp.h>
+ #include <plat/cpu.h>
-#include <plat/dma.h>
+ #include <linux/platform_data/asoc-ti-mcbsp.h>
#include "mcbsp.h"
#include "omap-mcbsp.h"
#include "omap-pcm.h"
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
+#include <sound/dmaengine_pcm.h>
#include <sound/soc.h>
-#include <plat/dma.h>
+ #include <plat/cpu.h>
#include "omap-pcm.h"
static const struct snd_pcm_hardware omap_pcm_hardware = {