ad->control_reg = ti_clk_get_reg_addr(node, 0);
ad->idlest_reg = ti_clk_get_reg_addr(node, 1);
- if (!ad->control_reg || !ad->idlest_reg)
+ if (IS_ERR(ad->control_reg) || IS_ERR(ad->idlest_reg))
goto cleanup;
ad->idlest_mask = 0x1;
ad->autoidle_reg = ti_clk_get_reg_addr(node, 1);
ad->idlest_reg = ti_clk_get_reg_addr(node, 2);
- if (!ad->control_reg || !ad->autoidle_reg || !ad->idlest_reg)
+ if (IS_ERR(ad->control_reg) || IS_ERR(ad->autoidle_reg) ||
+ IS_ERR(ad->idlest_reg))
goto cleanup;
clk = clk_register(NULL, &clk_hw->hw);
clk->name = node->name;
clk->reg = ti_clk_get_reg_addr(node, 0);
- if (!clk->reg) {
+ if (IS_ERR(clk->reg)) {
kfree(clk);
return -EINVAL;
}
* @index: register index from the clock node
*
* Builds clock register address from device tree information. This
- * is a struct of type clk_omap_reg.
+ * is a struct of type clk_omap_reg. Returns a pointer to the register
+ * address, or a pointer error value in failure.
*/
void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index)
{
if (i == CLK_MAX_MEMMAPS) {
pr_err("clk-provider not found for %s!\n", node->name);
- return NULL;
+ return ERR_PTR(-ENOENT);
}
reg->index = i;
if (of_property_read_u32_index(node, "reg", index, &val)) {
pr_err("%s must have reg[%d]!\n", node->name, index);
- return NULL;
+ return ERR_PTR(-EINVAL);
}
reg->offset = val;
u32 val;
*reg = ti_clk_get_reg_addr(node, 0);
- if (!*reg)
- return -EINVAL;
+ if (IS_ERR(*reg))
+ return PTR_ERR(*reg);
if (!of_property_read_u32(node, "ti,bit-shift", &val))
*shift = val;
#endif
} else {
dd->idlest_reg = ti_clk_get_reg_addr(node, 1);
- if (!dd->idlest_reg)
+ if (IS_ERR(dd->idlest_reg))
goto cleanup;
dd->mult_div1_reg = ti_clk_get_reg_addr(node, 2);
}
- if (!dd->control_reg || !dd->mult_div1_reg)
+ if (IS_ERR(dd->control_reg) || IS_ERR(dd->mult_div1_reg))
goto cleanup;
if (dd->autoidle_mask) {
dd->autoidle_reg = ti_clk_get_reg_addr(node, 3);
- if (!dd->autoidle_reg)
+ if (IS_ERR(dd->autoidle_reg))
goto cleanup;
}
if (ops != &omap_gate_clkdm_clk_ops) {
reg = ti_clk_get_reg_addr(node, 0);
- if (!reg)
+ if (IS_ERR(reg))
return;
if (!of_property_read_u32(node, "ti,bit-shift", &val))
return;
gate->enable_reg = ti_clk_get_reg_addr(node, 0);
- if (!gate->enable_reg)
+ if (IS_ERR(gate->enable_reg))
goto cleanup;
of_property_read_u32(node, "ti,bit-shift", &val);
u32 val;
reg = ti_clk_get_reg_addr(node, 0);
- if (!reg)
+ if (IS_ERR(reg))
return;
if (!of_property_read_u32(node, "ti,bit-shift", &val))
reg = ti_clk_get_reg_addr(node, 0);
- if (!reg)
+ if (IS_ERR(reg))
goto cleanup;
of_property_read_u32(node, "ti,bit-shift", &shift);
mux->reg = ti_clk_get_reg_addr(node, 0);
- if (!mux->reg)
+ if (IS_ERR(mux->reg))
goto cleanup;
if (!of_property_read_u32(node, "ti,bit-shift", &val))