ENGR00275246-01: ARM: dts: add fec phy reset for imx6sl evk board

Add fec phy reset for imx6sl evk board.
Add iomux gpr device node, which used for fec to clear gpr1[14],
gpr1[18-17] bit to select the fec clock sourcr from internal anatop PLL.

Signed-off-by: Fugang Duan  <B38611@freescale.com>

diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index c51f09a6e52306186bd72a3090a7c9090126b662..e9ffa7bc18e972b8a3cba99a95bbede84f4d1cc8 100644 (file)
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -23,6 +23,8 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_fec_1>;
        phy-mode = "rmii";
+       phy-reset-gpios = <&gpio4 21 0>; /* GPIO4_21 */
+       phy-reset-duration = <1>;
        status = "okay";
 };
 
@@ -38,6 +40,7 @@
                                MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
                                MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
                                MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
+                               MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21  0x80000000
                        >;
                };
        };

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index bf7870a25757b2e1a7b4a6b3e65f3c7f39908605..b2b702e0f85f016e11e1b1b6f5b17a74737575ad 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -525,6 +525,11 @@
                                interrupts = <0 89 0x04>;
                        };
 
+                       gpr: iomuxc-gpr@020e0000 {
+                               compatible = "fsl,imx6sl-iomuxc-gpr", "syscon";
+                               reg = <0x020e0000 0x38>;
+                       };
+
                        iomuxc: iomuxc@020e0000 {
                                compatible = "fsl,imx6sl-iomuxc";
                                reg = <0x020e0000 0x4000>;