]> git.karo-electronics.de Git - mv-sheeva.git/commitdiff
ARM: S5P: Changes the definition name of default UART registers
authorKukjin Kim <kgene.kim@samsung.com>
Wed, 21 Jul 2010 00:19:51 +0000 (09:19 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 5 Aug 2010 09:30:21 +0000 (18:30 +0900)
This patch changes the definition name of default UCON, ULCON, and
UFCON UART registers from ARCH(SoC) to Machine(Board). Because it
depends on machine.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s5p6440/mach-smdk6440.c
arch/arm/mach-s5p6442/mach-smdk6442.c
arch/arm/mach-s5pc100/mach-smdkc100.c
arch/arm/mach-s5pv210/mach-aquila.c
arch/arm/mach-s5pv210/mach-goni.c
arch/arm/mach-s5pv210/mach-smdkc110.c
arch/arm/mach-s5pv210/mach-smdkv210.c

index 8291fecc701ad94ef6a78e78488ad94410668b5e..fedc1423f1f9c089c70c93d8aa19d990649b058e 100644 (file)
 #include <plat/adc.h>
 #include <plat/ts.h>
 
-#define S5P6440_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |       \
+#define SMDK6440_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                S3C2410_UCON_RXILEVEL |         \
                                S3C2410_UCON_TXIRQMODE |        \
                                S3C2410_UCON_RXIRQMODE |        \
                                S3C2410_UCON_RXFIFO_TOI |       \
                                S3C2443_UCON_RXERR_IRQEN)
 
-#define S5P6440_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define SMDK6440_ULCON_DEFAULT S3C2410_LCON_CS8
 
-#define S5P6440_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |      \
+#define SMDK6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
                                S3C2440_UFCON_TXTRIG16 |        \
                                S3C2410_UFCON_RXTRIG8)
 
@@ -58,30 +58,30 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
-               .ucon        = S5P6440_UCON_DEFAULT,
-               .ulcon       = S5P6440_ULCON_DEFAULT,
-               .ufcon       = S5P6440_UFCON_DEFAULT,
+               .ucon        = SMDK6440_UCON_DEFAULT,
+               .ulcon       = SMDK6440_ULCON_DEFAULT,
+               .ufcon       = SMDK6440_UFCON_DEFAULT,
        },
        [1] = {
                .hwport      = 1,
                .flags       = 0,
-               .ucon        = S5P6440_UCON_DEFAULT,
-               .ulcon       = S5P6440_ULCON_DEFAULT,
-               .ufcon       = S5P6440_UFCON_DEFAULT,
+               .ucon        = SMDK6440_UCON_DEFAULT,
+               .ulcon       = SMDK6440_ULCON_DEFAULT,
+               .ufcon       = SMDK6440_UFCON_DEFAULT,
        },
        [2] = {
                .hwport      = 2,
                .flags       = 0,
-               .ucon        = S5P6440_UCON_DEFAULT,
-               .ulcon       = S5P6440_ULCON_DEFAULT,
-               .ufcon       = S5P6440_UFCON_DEFAULT,
+               .ucon        = SMDK6440_UCON_DEFAULT,
+               .ulcon       = SMDK6440_ULCON_DEFAULT,
+               .ufcon       = SMDK6440_UFCON_DEFAULT,
        },
        [3] = {
                .hwport      = 3,
                .flags       = 0,
-               .ucon        = S5P6440_UCON_DEFAULT,
-               .ulcon       = S5P6440_ULCON_DEFAULT,
-               .ufcon       = S5P6440_UFCON_DEFAULT,
+               .ucon        = SMDK6440_UCON_DEFAULT,
+               .ulcon       = SMDK6440_ULCON_DEFAULT,
+               .ufcon       = SMDK6440_UFCON_DEFAULT,
        },
 };
 
index ebcf997772593c9403912f8880021c5639cf6fa1..6107bd8b47c2863477eecaef54d0d7bd316e6720 100644 (file)
 #include <plat/cpu.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5P6442_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+#define SMDK6442_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5P6442_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8
 
-#define S5P6442_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+#define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
                                 S5PV210_UFCON_TXTRIG4 |        \
                                 S5PV210_UFCON_RXTRIG4)
 
@@ -44,23 +44,23 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5P6442_UCON_DEFAULT,
-               .ulcon          = S5P6442_ULCON_DEFAULT,
-               .ufcon          = S5P6442_UFCON_DEFAULT,
+               .ucon           = SMDK6442_UCON_DEFAULT,
+               .ulcon          = SMDK6442_ULCON_DEFAULT,
+               .ufcon          = SMDK6442_UFCON_DEFAULT,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5P6442_UCON_DEFAULT,
-               .ulcon          = S5P6442_ULCON_DEFAULT,
-               .ufcon          = S5P6442_UFCON_DEFAULT,
+               .ucon           = SMDK6442_UCON_DEFAULT,
+               .ulcon          = SMDK6442_ULCON_DEFAULT,
+               .ufcon          = SMDK6442_UFCON_DEFAULT,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5P6442_UCON_DEFAULT,
-               .ulcon          = S5P6442_ULCON_DEFAULT,
-               .ufcon          = S5P6442_UFCON_DEFAULT,
+               .ucon           = SMDK6442_UCON_DEFAULT,
+               .ulcon          = SMDK6442_ULCON_DEFAULT,
+               .ufcon          = SMDK6442_UFCON_DEFAULT,
        },
 };
 
index af22f8202a0711b35f0f76929d364a9b05f2e49b..c708db35960d03c639e063a104137f8085c32c49 100644 (file)
 #include <plat/iic.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+#define SMDKC100_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PC100_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define SMDKC100_ULCON_DEFAULT S3C2410_LCON_CS8
 
-#define S5PC100_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
                                 S3C2440_UFCON_RXTRIG8 |        \
                                 S3C2440_UFCON_TXTRIG16)
 
@@ -61,30 +61,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
-               .ucon        = S5PC100_UCON_DEFAULT,
-               .ulcon       = S5PC100_ULCON_DEFAULT,
-               .ufcon       = S5PC100_UFCON_DEFAULT,
+               .ucon        = SMDKC100_UCON_DEFAULT,
+               .ulcon       = SMDKC100_ULCON_DEFAULT,
+               .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
        [1] = {
                .hwport      = 1,
                .flags       = 0,
-               .ucon        = S5PC100_UCON_DEFAULT,
-               .ulcon       = S5PC100_ULCON_DEFAULT,
-               .ufcon       = S5PC100_UFCON_DEFAULT,
+               .ucon        = SMDKC100_UCON_DEFAULT,
+               .ulcon       = SMDKC100_ULCON_DEFAULT,
+               .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
        [2] = {
                .hwport      = 2,
                .flags       = 0,
-               .ucon        = S5PC100_UCON_DEFAULT,
-               .ulcon       = S5PC100_ULCON_DEFAULT,
-               .ufcon       = S5PC100_UFCON_DEFAULT,
+               .ucon        = SMDKC100_UCON_DEFAULT,
+               .ulcon       = SMDKC100_ULCON_DEFAULT,
+               .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
        [3] = {
                .hwport      = 3,
                .flags       = 0,
-               .ucon        = S5PC100_UCON_DEFAULT,
-               .ulcon       = S5PC100_ULCON_DEFAULT,
-               .ufcon       = S5PC100_UFCON_DEFAULT,
+               .ucon        = SMDKC100_UCON_DEFAULT,
+               .ulcon       = SMDKC100_ULCON_DEFAULT,
+               .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
 };
 
index 10bc76ec4025063f6e298775057772dd561edeb3..9d30213463ef6b61c245836bc728760ddc9c3cd1 100644 (file)
 #include <plat/fb.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+#define AQUILA_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define AQUILA_ULCON_DEFAULT   S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+#define AQUILA_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
                                 S5PV210_UFCON_TXTRIG4 |        \
                                 S5PV210_UFCON_RXTRIG4)
 
@@ -47,30 +47,30 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
+               .ufcon          = AQUILA_UFCON_DEFAULT,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
+               .ufcon          = AQUILA_UFCON_DEFAULT,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
+               .ufcon          = AQUILA_UFCON_DEFAULT,
        },
        [3] = {
                .hwport         = 3,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
+               .ufcon          = AQUILA_UFCON_DEFAULT,
        },
 };
 
index 4863b13824e4e1693727cb7be28d97b4fc5f4150..1521ea11e8c70c09ee2d5f07a87eef1b2697b16a 100644 (file)
 #include <plat/cpu.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+#define GONI_UCON_DEFAULT      (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define GONI_ULCON_DEFAULT     S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+#define GONI_UFCON_DEFAULT     (S3C2410_UFCON_FIFOMODE |       \
                                 S5PV210_UFCON_TXTRIG4 |        \
                                 S5PV210_UFCON_RXTRIG4)
 
@@ -44,30 +44,30 @@ static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
+               .ufcon          = GONI_UFCON_DEFAULT,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
+               .ufcon          = GONI_UFCON_DEFAULT,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
+               .ufcon          = GONI_UFCON_DEFAULT,
        },
        [3] = {
                .hwport         = 3,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
+               .ufcon          = GONI_UFCON_DEFAULT,
        },
 };
 
index 4c8903c6d1044af2488a4d58421d64b7194b3c0e..7878f695f2ced1f02993809e758bebb855c691e2 100644 (file)
 #include <plat/cpu.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+#define SMDKC110_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
                                 S5PV210_UFCON_TXTRIG4 |        \
                                 S5PV210_UFCON_RXTRIG4)
 
@@ -44,30 +44,30 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKC110_UCON_DEFAULT,
+               .ulcon          = SMDKC110_ULCON_DEFAULT,
+               .ufcon          = SMDKC110_UFCON_DEFAULT,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKC110_UCON_DEFAULT,
+               .ulcon          = SMDKC110_ULCON_DEFAULT,
+               .ufcon          = SMDKC110_UFCON_DEFAULT,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKC110_UCON_DEFAULT,
+               .ulcon          = SMDKC110_ULCON_DEFAULT,
+               .ufcon          = SMDKC110_UFCON_DEFAULT,
        },
        [3] = {
                .hwport         = 3,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKC110_UCON_DEFAULT,
+               .ulcon          = SMDKC110_ULCON_DEFAULT,
+               .ufcon          = SMDKC110_UFCON_DEFAULT,
        },
 };
 
index 0d462794804066afb6d705ca47c3005681bc7410..d1df1882ab189d51c630f3076b795a802a4814fa 100644 (file)
 #include <plat/ts.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+#define SMDKV210_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT  S3C2410_LCON_CS8
+#define SMDKV210_ULCON_DEFAULT S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
                                 S5PV210_UFCON_TXTRIG4 |        \
                                 S5PV210_UFCON_RXTRIG4)
 
@@ -46,30 +46,30 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKV210_UCON_DEFAULT,
+               .ulcon          = SMDKV210_ULCON_DEFAULT,
+               .ufcon          = SMDKV210_UFCON_DEFAULT,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKV210_UCON_DEFAULT,
+               .ulcon          = SMDKV210_ULCON_DEFAULT,
+               .ufcon          = SMDKV210_UFCON_DEFAULT,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKV210_UCON_DEFAULT,
+               .ulcon          = SMDKV210_ULCON_DEFAULT,
+               .ufcon          = SMDKV210_UFCON_DEFAULT,
        },
        [3] = {
                .hwport         = 3,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT,
+               .ucon           = SMDKV210_UCON_DEFAULT,
+               .ulcon          = SMDKV210_ULCON_DEFAULT,
+               .ufcon          = SMDKV210_UFCON_DEFAULT,
        },
 };