]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
drm/i915: Add a name for the Punit GPLLENABLE bit
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 7 Nov 2014 19:33:44 +0000 (21:33 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 17 Nov 2014 14:30:38 +0000 (15:30 +0100)
Remove the magic number for the GPLLENABLE bit by adding a name for it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S<deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c

index a143127eb451b3f9d6cb4d6cbdc2ef2273d064d0..faf61f5fc0ec2a98aeccd7c661bef7fd7e52c93f 100644 (file)
@@ -576,6 +576,7 @@ enum punit_power_well {
 #define PUNIT_REG_GPU_LFM                      0xd3
 #define PUNIT_REG_GPU_FREQ_REQ                 0xd4
 #define PUNIT_REG_GPU_FREQ_STS                 0xd8
+#define   GPLLENABLE                           (1<<4)
 #define   GENFREQSTATUS                                (1<<0)
 #define PUNIT_REG_MEDIA_TURBO_FREQ_REQ         0xdc
 #define PUNIT_REG_CZ_TIMESTAMP                 0xce
index fcbe335e37a32fea64accd9cf03fe02a0f03aa91..1f2441ffa6e4f623381a2809470d1f225496982c 100644 (file)
@@ -5333,7 +5333,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
 
        val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
 
-       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
+       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
        DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
 
        dev_priv->rps.cur_freq = (val >> 8) & 0xff;
@@ -5413,7 +5413,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
 
        val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
 
-       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
+       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
        DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
 
        dev_priv->rps.cur_freq = (val >> 8) & 0xff;