ENGR00332994: ARM: dts: imx6sl: fix gpu power up failed

In ldo-bypass mode, antop regulator will bypass vddarm and vddsoc
if found these two have been bypassed,and keep internal vddsoc as 0.
That caused vddpu always set 0 because it tracked with vddsoc while enable.
Add 'regulator-allow-bypass' to set anatop_reg->bypass 1 to avoid this
case.

Signed-off-by: Robin Gong <b38343@freescale.com>

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 018884cdc82cc90e37cee3c69d79984dc8aa37f2..cf098ab2d567ca2ae7db7254e5c6688cd8c442e7 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -513,6 +513,7 @@
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
 
                                reg_pu: regulator-vddpu@140 {
@@ -531,6 +532,7 @@
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
 
                                reg_soc: regulator-vddsoc@140 {
@@ -548,6 +550,7 @@
                                        anatop-min-bit-val = <1>;
                                        anatop-min-voltage = <725000>;
                                        anatop-max-voltage = <1450000>;
+                                       regulator-allow-bypass;
                                };
                        };