ENGR00273792-2 ARM:iMX6x: Improve CPUFREQ driver.

 1. Add support for VDDSOC/VDDPU operating points that track
 the VDDARM_CAP within 50mV to the device tree.
 2. Add CPU freq and VDDSOC/VDDPU operating points to MX6DL and MX6SL.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 0c5d63d460fb8ae63f833a63877f99f4f5687906..2399c40a54d89fffd0c325fe10ee922de4629a3f 100644 (file)
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -21,6 +21,26 @@
                        device_type = "cpu";
                        reg = <0>;
                        next-level-cache = <&L2>;
+                       operating-points = <
+                               /* kHz    uV */
+                               996000  1250000
+                               792000  1175000
+                               396000  1075000
+                       >;
+                       fsl,soc-operating-points = <
+                               /* ARM kHz      SOC-PU uV */
+                               996000            1175000
+                               792000            1175000
+                               396000            1175000
+                       >;
+                       clock-latency = <61036>; /* two CLK32 periods */
+                       clocks = <&clks 104>, <&clks 6>, <&clks 16>,
+                                <&clks 17>, <&clks 170>;
+                       clock-names = "arm", "pll2_pfd2_396m", "step",
+                                     "pll1_sw", "pll1_sys";
+                       arm-supply = <&reg_arm>;
+                       pu-supply = <&reg_pu>;
+                       soc-supply = <&reg_soc>;
                };
 
                cpu@1 {

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index e9d6b08ed8717a2f70afeed57f116a6a9838f997..d3adfbb5417bbd568544432d2019e26e713472b9 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -32,6 +32,13 @@
                                792000  1150000
                                396000  950000
                        >;
+                       fsl,soc-operating-points = <
+                               /* ARM kHz  SOC-PU uV */
+                               1200000       1275000
+                               996000        1250000
+                               792000        1175000
+                               396000        1175000
+                       >;
                        clock-latency = <61036>; /* two CLK32 periods */
                        clocks = <&clks 104>, <&clks 6>, <&clks 16>,
                                 <&clks 17>, <&clks 170>;

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index b2b702e0f85f016e11e1b1b6f5b17a74737575ad..57747a8b9bd1172326afcb24237186771161c5f5 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -34,6 +34,26 @@
                        device_type = "cpu";
                        reg = <0x0>;
                        next-level-cache = <&L2>;
+                       operating-points = <
+                               /* kHz   uV */
+                               996000  1250000
+                               792000  1150000
+                               396000  950000
+                       >;
+                       fsl,soc-operating-points = <
+                               /* ARM kHz      SOC-PU uV */
+                               996000            1200000
+                               792000            1150000
+                               396000            1150000
+                       >;
+                       clock-latency = <61036>; /* two CLK32 periods */
+                       clocks = <&clks 104>, <&clks 6>, <&clks 16>,
+                                <&clks 17>, <&clks 170>;
+                       clock-names = "arm", "pll2_pfd2_396m", "step",
+                                     "pll1_sw", "pll1_sys";
+                       arm-supply = <&reg_arm>;
+                       pu-supply = <&reg_pu>;
+                       soc-supply = <&reg_soc>;
                };
        };