ENGR00173731-5 MX6Q/ARCH :rename gpmi-nfc to gpmi-nand

rename the gpmi-nfc to gpmi-nand.

Signed-off-by: Huang Shijie <b32955@freescale.com>

diff --git a/arch/arm/mach-mx6/board-mx6q_arm2.c b/arch/arm/mach-mx6/board-mx6q_arm2.c
index 7c655af181fbfba6e91d187f1b83cb58018064e5..09268f0f12c98e514a9cd2f9f6a130446686805c 100644 (file)
--- a/arch/arm/mach-mx6/board-mx6q_arm2.c
+++ b/arch/arm/mach-mx6/board-mx6q_arm2.c
@@ -492,15 +492,15 @@ static iomux_v3_cfg_t mx6q_gpmi_nand[] __initdata = {
        MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN,
 };
 
-static int gpmi_nfc_platform_init(void)
+static int gpmi_nand_platform_init(void)
 {
        return mxc_iomux_v3_setup_multiple_pads(mx6q_gpmi_nand,
                                        ARRAY_SIZE(mx6q_gpmi_nand));
 }
 
-static const struct gpmi_nfc_platform_data
-mx6q_gpmi_nfc_platform_data __initconst = {
-       .platform_init           = gpmi_nfc_platform_init,
+static const struct gpmi_nand_platform_data
+mx6q_gpmi_nand_platform_data __initconst = {
+       .platform_init           = gpmi_nand_platform_init,
        .min_prop_delay_in_ns    = 5,
        .max_prop_delay_in_ns    = 9,
        .max_chip_count          = 1,
@@ -1639,7 +1639,7 @@ static void __init mx6_board_init(void)
        imx6q_add_viim();
        imx6q_add_imx2_wdt(0, NULL);
        imx6q_add_dma();
-       imx6q_add_gpmi(&mx6q_gpmi_nfc_platform_data);
+       imx6q_add_gpmi(&mx6q_gpmi_nand_platform_data);
 
        imx6q_add_dvfs_core(&arm2_dvfscore_data);
 

diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c
index 5938b9a7ddf325942f067655157b82be4f2e40dd..081b1e93a24e9313efe0e563e203774c6803ea06 100644 (file)
--- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c
+++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c
@@ -498,15 +498,15 @@ static iomux_v3_cfg_t mx6q_gpmi_nand[] __initdata = {
        MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN,
 };
 
-static int gpmi_nfc_platform_init(void)
+static int gpmi_nand_platform_init(void)
 {
        return mxc_iomux_v3_setup_multiple_pads(mx6q_gpmi_nand,
                                        ARRAY_SIZE(mx6q_gpmi_nand));
 }
 
-static const struct gpmi_nfc_platform_data
-mx6q_gpmi_nfc_platform_data __initconst = {
-       .platform_init           = gpmi_nfc_platform_init,
+static const struct gpmi_nand_platform_data
+mx6q_gpmi_nand_platform_data __initconst = {
+       .platform_init           = gpmi_nand_platform_init,
        .min_prop_delay_in_ns    = 5,
        .max_prop_delay_in_ns    = 9,
        .max_chip_count          = 1,
@@ -1498,7 +1498,7 @@ static void __init mx6_board_init(void)
        imx6q_add_viim();
        imx6q_add_imx2_wdt(0, NULL);
        imx6q_add_dma();
-       imx6q_add_gpmi(&mx6q_gpmi_nfc_platform_data);
+       imx6q_add_gpmi(&mx6q_gpmi_nand_platform_data);
 
        imx6q_add_dvfs_core(&sabreauto_dvfscore_data);
 

diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index 685eb3d35dac9330e1d7e0dca3bc714d2a0bcf7d..e3ee229bc18c6d47728c5922c9f91ab386be995a 100644 (file)
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -4478,11 +4478,11 @@ static struct clk gpu3d_shader_clk = {
 };
 
 /* set the parent by the ipcg table */
-static struct clk gpmi_nfc_clk[] = {
+static struct clk gpmi_nand_clk[] = {
        {       /* gpmi_io_clk */
        __INIT_CLK_DEBUG(gpmi_io_clk)
        .parent = &enfc_clk,
-       .secondary = &gpmi_nfc_clk[1],
+       .secondary = &gpmi_nand_clk[1],
        .enable = _clk_enable,
        .enable_reg = MXC_CCM_CCGR4,
        .enable_shift = MXC_CCM_CCGRx_CG14_OFFSET,
@@ -4491,7 +4491,7 @@ static struct clk gpmi_nfc_clk[] = {
        {       /* gpmi_apb_clk */
        __INIT_CLK_DEBUG(gpmi_apb_clk)
        .parent = &usdhc3_clk,
-       .secondary = &gpmi_nfc_clk[2],
+       .secondary = &gpmi_nand_clk[2],
        .enable = _clk_enable,
        .enable_reg = MXC_CCM_CCGR4,
        .enable_shift = MXC_CCM_CCGRx_CG15_OFFSET,
@@ -4500,7 +4500,7 @@ static struct clk gpmi_nfc_clk[] = {
        {       /* bch_clk */
        __INIT_CLK_DEBUG(gpmi_bch_clk)
        .parent = &usdhc4_clk,
-       .secondary = &gpmi_nfc_clk[3],
+       .secondary = &gpmi_nand_clk[3],
        .enable = _clk_enable,
        .enable_reg = MXC_CCM_CCGR4,
        .enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,
@@ -4509,7 +4509,7 @@ static struct clk gpmi_nfc_clk[] = {
        {       /* bch_apb_clk */
        __INIT_CLK_DEBUG(gpmi_bch_apb_clk)
        .parent = &usdhc3_clk,
-       .secondary = &gpmi_nfc_clk[4],
+       .secondary = &gpmi_nand_clk[4],
        .enable = _clk_enable,
        .enable_reg = MXC_CCM_CCGR4,
        .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
@@ -5044,11 +5044,11 @@ static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK(NULL, "gpu2d_clk", gpu2d_core_clk[0]),
        _REGISTER_CLOCK(NULL, "gpu3d_shader_clk", gpu3d_shader_clk),
        _REGISTER_CLOCK(NULL, "gpt", gpt_clk[0]),
-       _REGISTER_CLOCK("imx6q-gpmi-nfc.0", NULL, gpmi_nfc_clk[0]),
-       _REGISTER_CLOCK(NULL, "gpmi-apb", gpmi_nfc_clk[1]),
-       _REGISTER_CLOCK(NULL, "bch", gpmi_nfc_clk[2]),
-       _REGISTER_CLOCK(NULL, "bch-apb", gpmi_nfc_clk[3]),
-       _REGISTER_CLOCK(NULL, "pl301_mx6qperl-bch", gpmi_nfc_clk[4]),
+       _REGISTER_CLOCK("imx6q-gpmi-nand.0", NULL, gpmi_nand_clk[0]),
+       _REGISTER_CLOCK(NULL, "gpmi-apb", gpmi_nand_clk[1]),
+       _REGISTER_CLOCK(NULL, "bch", gpmi_nand_clk[2]),
+       _REGISTER_CLOCK(NULL, "bch-apb", gpmi_nand_clk[3]),
+       _REGISTER_CLOCK(NULL, "pl301_mx6qperl-bch", gpmi_nand_clk[4]),
        _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm_clk[0]),
        _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm_clk[1]),
        _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm_clk[2]),

diff --git a/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c b/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c
index bc0c6ab47fd80c685e1be59fad964e79fb0e7ef6..a1e297d5c35d22d965b49d3cdccfb66c899e46de 100644 (file)
--- a/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-gpmi-nfc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -17,9 +17,9 @@
  * with this program; if not, write to the Free Software Foundation, Inc.,
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
+#include <linux/mtd/gpmi-nand.h>
 #include <asm/sizes.h>
 #include <mach/hardware.h>
-#include <mach/gpmi-nfc.h>
 #include <mach/devices-common.h>
 
 #ifdef CONFIG_SOC_IMX50
@@ -67,42 +67,42 @@ imx_add_gpmi(const struct gpmi_nfc_platform_data *platform_data)
 
 #ifdef CONFIG_SOC_IMX6Q
 struct platform_device *__init
-imx_add_gpmi(const struct gpmi_nfc_platform_data *platform_data)
+imx_add_gpmi(const struct gpmi_nand_platform_data *platform_data)
 {
        struct resource res[] = {
        { /* GPMI */
-                .name  = GPMI_NFC_GPMI_REGS_ADDR_RES_NAME,
+                .name  = GPMI_NAND_GPMI_REGS_ADDR_RES_NAME,
                 .flags = IORESOURCE_MEM,
                 .start = MX6Q_GPMI_BASE_ADDR,
                 .end   = MX6Q_GPMI_BASE_ADDR + SZ_8K - 1,
        }, {
-                .name  = GPMI_NFC_GPMI_INTERRUPT_RES_NAME,
+                .name  = GPMI_NAND_GPMI_INTERRUPT_RES_NAME,
                 .flags = IORESOURCE_IRQ,
                 .start = MXC_INT_RAWNAND_GPMI,
                 .end   = MXC_INT_RAWNAND_GPMI,
        }, { /* BCH */
-                .name  = GPMI_NFC_BCH_REGS_ADDR_RES_NAME,
+                .name  = GPMI_NAND_BCH_REGS_ADDR_RES_NAME,
                 .flags = IORESOURCE_MEM,
                 .start = MX6Q_BCH_BASE_ADDR,
                 .end   = MX6Q_BCH_BASE_ADDR + SZ_8K - 1,
        }, {
-                .name  = GPMI_NFC_BCH_INTERRUPT_RES_NAME,
+                .name  = GPMI_NAND_BCH_INTERRUPT_RES_NAME,
                 .flags = IORESOURCE_IRQ,
                 .start = MXC_INT_RAWNAND_BCH,
                 .end   = MXC_INT_RAWNAND_BCH,
        }, { /* DMA */
-                .name  = GPMI_NFC_DMA_CHANNELS_RES_NAME,
+                .name  = GPMI_NAND_DMA_CHANNELS_RES_NAME,
                 .flags = IORESOURCE_DMA,
                 .start = MX6Q_DMA_CHANNEL_AHB_APBH_GPMI0,
                 .end   = MX6Q_DMA_CHANNEL_AHB_APBH_GPMI7,
        }, {
-                .name  = GPMI_NFC_DMA_INTERRUPT_RES_NAME,
+                .name  = GPMI_NAND_DMA_INTERRUPT_RES_NAME,
                 .flags = IORESOURCE_IRQ,
                 .start = MXC_INT_APBHDMA_DMA,
                 .end   = MXC_INT_APBHDMA_DMA,
        }, };
 
-       return imx_add_platform_device_dmamask("imx6q-gpmi-nfc", 0,
+       return imx_add_platform_device_dmamask("imx6q-gpmi-nand", 0,
                        res, ARRAY_SIZE(res), platform_data,
                        sizeof(*platform_data), DMA_BIT_MASK(32));
 }

diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 8538d5b658c25dcaf7a1fce7d4480d5b8e445f90..2f5f04c39638164cb39b5943b24f2018df84c75d 100755 (executable)
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -621,10 +621,10 @@ struct platform_device *__init imx_add_fsl_usb2_wakeup(
                const struct imx_fsl_usb2_wakeup_data *data,
                const struct fsl_usb2_wakeup_platform_data *pdata);
 
-/* gpmi-nfc */
-#include <mach/gpmi-nfc.h>
+/* gpmi-nand*/
+#include <linux/mtd/gpmi-nand.h>
 struct platform_device *__init imx_add_gpmi(
-               const struct gpmi_nfc_platform_data *data);
+               const struct gpmi_nand_platform_data *data);
 
 struct imx_rngb_data {
        resource_size_t iobase;